Electronic Components Datasheet Search
  English  ▼

X  

LM86 Datasheet(PDF) 10 Page - Texas Instruments

Part # LM86
Description  ±0.75°C Accurate, Remote Diode and Local Digital Temperature Sensor With Two-Wire Interface
PDF  38 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  TI2 [Texas Instruments]
Direct Link  https://www.ti.com
Logo TI2 - Texas Instruments

LM86 Datasheet(HTML) 10 Page - Texas Instruments

Back Button LM86 Datasheet HTML 6Page - Texas Instruments LM86 Datasheet HTML 7Page - Texas Instruments LM86 Datasheet HTML 8Page - Texas Instruments LM86 Datasheet HTML 9Page - Texas Instruments LM86 Datasheet HTML 10Page - Texas Instruments LM86 Datasheet HTML 11Page - Texas Instruments LM86 Datasheet HTML 12Page - Texas Instruments LM86 Datasheet HTML 13Page - Texas Instruments LM86 Datasheet HTML 14Page - Texas Instruments Next Button
Zoom Inzoom in Zoom Outzoom out
 10 / 38 page
background image
Remote High Limit
RDTS Measurement
TIME
LM86 ALERT pin
Status Register: RTDS High
End of Temperature
conversion
ALERT mask set in
response to reading of
status register by
master
LM86
SNIS114E – DECEMBER 2001 – REVISED MARCH 2013
www.ti.com
Figure 5. ALERT Output as an Interrupt Temperature Response Diagram
ALERT Output as an SMBus ALERT
When the ALERT output is connected to one or more ALERT outputs of other SMBus compatible devices and to
a master, an SMBus alert line is created. Under this implementation, the LM86's ALERT should be operated
using the ARA (Alert Response Address) protocol. The SMBus 2.0 ARA protocol, defined in the SMBus
specification 2.0, is a procedure designed to assist the master in resolving which part generated an interrupt and
service that interrupt while impeding system operation as little as possible.
The SMBus alert line is connected to the open-drain ports of all devices on the bus thereby AND'ing them
together. The ARA is a method by which with one command the SMBus master may identify which part is pulling
the SMBus alert line LOW and prevent it from pulling it LOW again for the same triggering condition. When an
ARA command is received by all devices on the bus, the devices pulling the SMBus alert line LOW, first, send
their address to the master and second, release the SMBus alert line after recognizing a successful transmission
of their address.
The SMBus 1.1 and 2.0 specification state that in response to an ARA (Alert Response Address) “after
acknowledging the slave address the device must disengage its SMBALERT pulldown”. Furthermore, “if the host
still sees SMBALERT low when the message transfer is complete, it knows to read the ARA again”. This SMBus
“disengaging of SMBALERT” requirement prevents locking up the SMBus alert line. Competitive parts may
address this “disengaging of SMBALERT” requirement differently than the LM86 or not at all. SMBus systems
that implement the ARA protocol as suggested for the LM86 will be fully compatible with all competitive parts.
The LM86 fulfills “disengaging of SMBALERT” by setting the ALERT mask bit (bit D7 in the Configuration
register, at address 09h) after successfully sending out its address in response to an ARA and releasing the
ALERT output pin. Once the ALERT mask bit is activated, the ALERT output pin will be disabled until enabled by
software. In order to enable the ALERT the master must read the STATUS REGISTER, at address 02h, during
the interrupt service routine and then reset the ALERT mask bit in the Configuration register to 0 at the end of
the interrupt service routine.
The following sequence describes the ARA response protocol.
1. Master Senses SMBus alert line low
2. Master sends a START followed by the Alert Response Address (ARA) with a Read Command.
3. Alerting Device(s) send ACK.
4. Alerting Device(s) send their Address. While transmitting their address, alerting devices sense whether their
address has been transmitted correctly. (The LM86 will reset its ALERT output and set the ALERT mask bit
once its complete address has been transmitted successfully.)
5. Master/slave NoACK
6. Master sends STOP
7. Master attends to conditions that caused the ALERT to be triggered. The STATUS REGISTER is read and
fan started, setpoint limits adjusted, etc.
8. Master resets the ALERT mask (D7 in the Configuration register).
10
Submit Documentation Feedback
Copyright © 2001–2013, Texas Instruments Incorporated
Product Folder Links: LM86



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com