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TAS5622ADDVR Datasheet(PDF) 30 Page - Texas Instruments

Part # TAS5622ADDVR
Description  TAS5622A 125-W Stereo and 250-W Stereo PurePath™ HD Digital-Input Class-D Power Stage
PDF  44 Pages
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Manufacturer  TI2 [Texas Instruments]
Direct Link  https://www.ti.com
Logo TI2 - Texas Instruments

TAS5622ADDVR Datasheet(HTML) 30 Page - Texas Instruments

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TAS5622A
SLAS845A – MAY 2012 – REVISED MARCH 2015
www.ti.com
9 Power Supply Recommendations
To facilitate system design, the TAS5622A needs only a 12-V supply in addition to the (typical) 32.5-V power-
stage supply. An internal voltage regulator provides suitable voltage levels for the digital and low-voltage analog
circuitry. Additionally, all circuitry requiring a floating voltage supply, that is, the high-side gate drive, is
accommodated by built-in bootstrap circuitry requiring only an external capacitor for each half-bridge.
To provide outstanding electrical and acoustical characteristics, the PWM signal path including gate drive and
output stage is designed as identical, independent half-bridges. For this reason, each half-bridge has separate
bootstrap pins (BST_X) and each full-bridge has separate power stage supply (PVDD_X) and gate supply
(GVDD_X) pins. Although supplied from the same 12-V source, it is highly recommended to separate GVDD_AB,
GVDD_CD, and VDD on the printed-circuit board (PCB) by RC filters (see application diagram for details). These
RC filters provide the recommended high-frequency isolation. Special attention should be paid to placing all
decoupling capacitors as close to their associated pins as possible. In general, inductance between the power
supply pins and decoupling capacitors must be avoided. (See reference board documentation for additional
information.)
Special attention should be paid to the power-stage power supply; this includes component selection, PCB
placement, and routing. As indicated, each full-bridge has independent power-stage supply pins (PVDD_X). For
optimal electrical performance, EMI compliance, and system reliability, it is important that each PVDD_X
connection is decoupled with minimum 2x 220 nF ceramic capacitors placed as close as possible to each supply
pin. It is recommended to follow the PCB layout of the TAS5622A reference design. For additional information on
recommended power supply and required components, see the application diagrams in this data sheet.
The 12-V supply should be from a low-noise, low-output-impedance voltage regulator. Likewise, the 32.5-V
power-stage supply is assumed to have low output impedance and low noise. The power-supply sequence is not
critical as facilitated by the internal power-on-reset circuit. Moreover, the TAS5622A is fully protected against
erroneous power-stage turn on due to parasitic gate charging when power supplies are applied. Thus, voltage-
supply ramp rates (dV/dt) are noncritical within the specified range (see the Recommended Operating Conditions
table of this data sheet).
9.1 Boot Strap Supply
For a properly functioning bootstrap circuit, a small ceramic capacitor must be connected from each bootstrap pin
(BST_X) to the power-stage output pin (OUT_X). When the power-stage output is low, the bootstrap capacitor is
charged through an internal diode connected between the gate-drive power-supply pin (GVDD_X) and the
bootstrap pin. When the power-stage output is high, the bootstrap capacitor potential is shifted above the output
potential and thus provides a suitable voltage supply for the high-side gate driver. In an application with PWM
switching frequencies in the range from 300 kHz to 400 kHz, it is recommended to use 33-nF ceramic capacitors,
size 0603 or 0805, for the bootstrap supply. These 33-nF capacitors ensure sufficient energy storage, even
during minimal PWM duty cycles, to keep the high-side power stage FET (LDMOS) fully turned on during the
remaining part of the PWM cycle.
10 Layout
10.1 Layout Guidelines
A rising-edge transition on reset input allows the device to execute the start-up sequence and starts switching.
Apply audio only according to the timing information for start-up and shutdown sequence. That will start and stop
the amplifier without audible artifacts in the output transducers.
The CLIP signal indicates that the output is approaching clipping (when output PWM starts skipping pulses due
to loop filter saturation). The signal can be used to initiate an audio volume decrease or to adjust the power
supply rail.
The device inverts the audio signal from input to output.
The DVDD and AVDD pins are not recommended to be used as a voltage source for external circuitry.
30
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