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INA139, INA169

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SBOS181F – DECEMBER 2000 – REVISED FEBRUARY 2017

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Typical Applications (continued)

8.2.1.2 Detailed Design Procedure

8.2.1.2.1

Selecting RS and RL

In Figure 9 the value selected for the shunt resistor ( RS) depends on the application and is a compromise

between small-signal accuracy and maximum permissible voltage loss in the measurement line. High values of

RS provide better accuracy at lower currents by minimizing the effects of offset, while low values of RS minimize

voltage loss in the supply line. For most applications, best performance is attained with an RS value that provides

a full-scale shunt voltage of 50 mV to 100 mV; maximum input voltage for accurate measurements is 500 mV.

RL is selected to provide the desired full-scale output voltage. The output impedance of the INA139 and INA169

OUT terminal is very high, which permits using values of RL up to 100 kΩ with excellent accuracy. The input

impedance of any additional circuitry at the output must be much higher than the value of RL to avoid degrading

accuracy.

Some analog-to-digital converters (ADCs) have input impedances that significantly affect measurement gain. The

input impedance of the ADC can be included as part of the effective RL if the input can be modeled as a resistor

to ground. Alternatively, an operational amplifier can be used to buffer the ADC input, as shown in Figure 10. The

INA139 and INA169 are current output devices, and have an inherently large output impedance. The output

currents from the amplifier are converted to an output voltage through the load resistor (RL) connected from the

amplifier output to ground. The ratio of the load resistor value to that of the internal resistor value determines the

voltage gain of the system.

In many applications, digitizing the output of the INA139 or INA169 devices is required. This is accomplished by

connecting the output of the amplifier to an ADC. It is very common for an ADC to have a dynamic input

impedance. If the INA139 or INA169 output is connected directly to an ADC input, the input impedance of the

ADC is effectively connected in parallel with the gain setting resistor (RL.) This parallel impedance combination

affects the gain of the system and the impact on the gain is difficult to estimate accurately. A simple solution that

eliminates the paralleling of impedances, simplifying the gain of the circuit is to place a buffer amplifier (such as

the OPA340) between the output of the INA139 or INA169 devices and the input to the ADC.

Figure 10 illustrates this concept. A low-pass filter can be placed between the OPA340 output and the input to

the ADC. The filter capacitor is required to provide any instantaneous demand for current required by the input

stage of the ADC. The filter resistor is required to isolate the OPA340 output from the filter capacitor to maintain

circuit stability. The values for the filter components vary according to the operational amplifier used for the buffer

and the particular ADC selected. For more information regarding the design of the low-pass filter, see the 16-bit

1-MSPS Data Acquisition Reference Design for Single-Ended Multiplexed Applications TI Precision Design.

Figure 11 shows the expected results when driving an analog-to-digital converter at 1 MSPS with and without

buffering the INA139 or INA169 output. Without the buffer, the high impedance of the INA139 or INA169 reacts

with the input capacitance and sample and hold (S/H) capacitance of the analog-to-digital converter and does not

allow the S/H to reach the correct final value before the S/H resets and the next conversion starts. Adding the

buffer amplifier significantly reduces the output impedance driving the S/H and allows for higher conversion rates

than can be achieved without adding the buffer.