LP5030 datasheet(50/61 Pages) TI2

50 / 61 page

RIREF=

KIREF × VIREF

I(MAX_SET)

=105 ×0.7÷0.015=4900

LP5030, LP5036

SLVSEH1B – SEPTEMBER 2018 – REVISED JANUARY 2019

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Product Folder Links: LP5030 LP5036

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Typical Application (continued)

9.2.1 Design Requirements

Set the LED current to 15 mA using the RIREF resistor.

9.2.2 Detailed Design Procedure

The LP503x device scales up the reference current (IREF) set by the external resistor (RIREF) to sink the output

current (IOUT) at each output port. can be used to calculate the target output current IMAX_SET:

The SCL and SDA lines must each have a pullup resistor placed somewhere on the line (the pullup resistors are

normally located on the bus master). In typical applications, values of 1.8 kΩ to 4.7 kΩ are used, depending on

the bus capacitance, I/O voltage, and the desired communication speed. Selecting a smaller value increases the

pullup speed, but slows the pulldown speed. If they want pull up quickly select the samller one but it will impact

the pull down speed.

VCAP is the internal LDO output pin. This pin must be connected through a 1-μF capacitor to GND. Put the

capacitor as close to the device as possible.

TI recommends having a 1-μF capacitor between VCC and GND to ensure proper operation. Put the capacitor as

close to the device as possible.

9.2.3 Application Curves

The test condition for is that the testing is under bank control, using the following register values: 0x02 (0xFF),

0x04 (0xF0), 0x05 (0xF0), 0x06 (0xF0). The test condition for is that the testing is under bank control, using the

following register values: 0x02 (0xFF), 0x04 (0x0F), 0x05 (0x0F), 0x06 (0x0F).

Figure 79. Current Waveform of OUT0, OUT1, OUT2 and

OUT3

Figure 80. Current Waveform of OUT0, OUT1, OUT2 and

OUT3

LP5030 Datasheet(PDF) 50 Page - Texas Instruments