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ADP3110 Datasheet(PDF) 3 Page - Analog Devices

Part # ADP3110
Description  Dual Bootstrapped, 12 V MOSFET Driver with Output Disable
PDF  12 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

ADP3110 Datasheet(HTML) 3 Page - Analog Devices

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ADP3110
Rev. 0 | Page 3 of 12
SPECIFICATIONS
VCC = 12 V, BST = 4 V to 26 V, TA = 25°C, unless otherwise noted.
Table 1.1
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
PWM INPUT
Input Voltage High2
2.0
V
Input Voltage Low2
0.8
V
Input Current2
−1
+1
μA
Hysteresis2
90
250
mV
OD INPUT
Input Voltage High2
2.0
V
Input Voltage Low2
0.8
V
Input Current 2
−1
+1
μA
Hysteresis2
90
250
mV
Propagation Delay Times3
OD
tpdl
See Figure 3
20
35
ns
OD
tpdh
See Figure 3
40
55
ns
HIGH-SIDE DRIVER
Output Resistance, Sourcing Current
BST to SW = 12 V
3.8
4.4
Ω
Output Resistance, Sinking Current
RDRV + SW
BST to SW = 12 V
1.4
1.8
Ω
Output Resistance, Unbiased
BST to SW = 0 V
10
kΩ
Transition Times
trDRVH
BST to SW = 12 V, CLOAD = 3 nF, see Figure 4
40
55
ns
tfDRVH
BST to SW = 12 V, CLOAD = 3 nF, see Figure 4
30
45
ns
Propagation Delay Times3
tpdhDRVH
BST to SW = 12 V, CLOAD = 3 nF,see Figure 4
45
65
ns
tpdlDRVH
BST to SW = 12 V, CLOAD = 3 nF, see Figure 4
25
35
ns
SW Pull Down Resistance
RSW − PGND
SW to PGND
10
kΩ
LOW-SIDE DRIVER
Output Resistance, Sourcing Current
3.4
4.0
Ω
Output Resistance, Sinking Current
RDRVL − PGND
1.4
1.8
Ω
Output Resistance, Unbiased
VCC = PGND
10
kΩ
Transition Times
trDRVL
CLOAD = 3 nF, see Figure 4
40
50
ns
tfDRVL
CLOAD = 3 nF, see Figure 4
20
30
ns
Propagation Delay Times3
tpdhDRVL
CLOAD = 3 nF, see Figure 4
15
35
ns
tpdlDRVL
CLOAD = 3 nF, see Figure 4
30
40
ns
Time-out Delay
SW = 5 V
110
190
ns
SW = PGND
95
150
ns
SUPPLY
Supply Voltage Range2
VCC
4.15
13.2
V
Supply Current2
ISYS
BST = 12 V, IN = 0 V
2
5
mA
UVLO Voltage2
VCC rising
1.5
3.0
V
Hysteresis2
350
mV
1 All limits at temperature extremes are guaranteed via correlation using standard statistical quality control (SQC) methods.
2 Specifications apply over the full operating temperature range TA = 0°C to 85°C.
3 For propagation delays, tpdh refers to the specified signal going high, and tpdl refers to it going low.



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