CDx4AC153 Dual 4-Line to 1-Line Data Selectors/Multiplexers

1 Features

• AC types feature 1.5V to 5.5V operation and

balanced noise immunity at 30% of the supply

• Speed of bipolar F, AS, and S, with significantly

reduced power consumption

• Balanced propagation delays

• ±24mA output drive current

– Fanout to 15 F devices

• SCR-latchup-resistant CMOS process and circuit

design

• Exceeds 2kV ESD protection per MIL-STD-883,

method 3015

2 Description

Each of these data selectors/multiplexers contains

inverters and drivers to supply full binary decoding

data selection to the AND-OR gates. Separate strobe

(G) inputs are provided for each of the two 4-line

sections.

Device Information

PART NUMBER

PACKAGE(1)

PACKAGE SIZE(2)

BODY SIZE(3)

CDx4AC153

N (PDIP, 16)

19.3mm × 9.4mm

19.3mm × 6.35mm

D (SOIC, 16)

9.9mm × 6mm

9.9mm × 3.9mm

PW (TSSOP, 16)

5mm × 6.4mm

5mm × 4.4mm

BQB (WQFN, 16)

3.5mm × 2.5mm

3.5mm × 2.5mm

(1)

For more information, see Section 10.

(2)

The package size (length × width) is a nominal value and

includes pins, where applicable.

(3)

The body size (length × width) is a nominal value and does

not include pins.

Logic Diagram (Positive Logic)

CD54AC153, CD74AC153

SCHS334C – MARCH 2003 – REVISED APRIL 2025

An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,

intellectual property matters and other important disclaimers. PRODUCTION DATA.