FORWARD

REVERSE

OUT1

OUT2

2

1

2

2

Forward drive

Slow decay (brake)

VM

1

OUT1

OUT2

2

1

2

2

Reverse drive

Slow decay (brake)

VM

1

3

3 High-Z (coast)

3 High-Z (coast)

3

8

DRV8871

SLVSCY9B – AUGUST 2015 – REVISED JULY 2016

www.ti.com

Product Folder Links: DRV8871

Submit Documentation Feedback

Copyright © 2015–2016, Texas Instruments Incorporated

7.3 Feature Description

7.3.1 Bridge Control

The DRV8871 output consists of four N-channel MOSFETs that are designed to drive high current. They are

controlled by the two logic inputs IN1 and IN2, according to Table 1.

Table 1. H-Bridge Control

IN1

IN2

OUT1

OUT2

DESCRIPTION

0

0

High-Z

High-Z

Coast; H-bridge disabled to High-Z (sleep entered after 1 ms)

0

1

L

H

Reverse (Current OUT2

→ OUT1)

1

0

H

L

Forward (Current OUT1

→ OUT2)

1

1

L

L

Brake; low-side slow decay

The inputs can be set to static voltages for 100% duty cycle drive, or they can be pulse-width modulated (PWM)

for variable motor speed. When using PWM, it typically works best to switch between driving and braking. For

example, to drive a motor forward with 50% of its max RPM, IN1 = 1 and IN2 = 0 during the driving period, and

IN1 = 1 and IN2 = 1 during the other period. Alternatively, the coast mode (IN1 = 0, IN2 = 0) for fast current

decay is also available. The input pins can be powered before VM is applied.

Figure 4. H-Bridge Current Paths

7.3.2 Sleep Mode

When IN1 and IN2 are both low for time tSLEEP (typically 1 ms), the DRV8871 device enters a low-power sleep

mode, where the outputs remain High-Z and the device uses IVMSLEEP (microamps) of current. If the device is

powered up while both inputs are low, sleep mode is immediately entered. After IN1 or IN2 are high for at least 5

µs, the device will be operational 50 µs (tON) later.

7.3.3 Current Regulation

The DRV8871 device limits the output current based on a standard resistor attached to pin ILIM, according to

this equation: