2.5 V

PRIREF_P

PRIREF_N

VAC_REF

156.25 MHz LVDS

From Backplane

156.25 MHz LVCMOS

Oscillator

50

50

PHY

ASIC

SECREF_P

SECREF_N

2.5 V

1k

1k

FPGA

CPU

100

100

100

100

Copyright © 2016, Texas Instruments Incorporated

13

CDCLVD1208

www.ti.com

SCAS899A – AUGUST 2010 – REVISED OCTOBER 2016

Product Folder Links: CDCLVD1208

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Copyright © 2010–2016, Texas Instruments Incorporated

9 Application and Implementation

NOTE

Information in the following applications sections is not part of the TI component

specification, and TI does not warrant its accuracy or completeness. TI’s customers are

responsible for determining suitability of components for their purposes. Customers should

validate and test their design implementation to confirm system functionality.

9.1 Application Information

The CDCLVD1208 is a low additive jitter universal to LVDS fan-out buffer with 2 selectable inputs. The small

package, low output skew, and low additive jitter make for a flexible device in demanding applications.

9.2 Typical Application

Figure 16. Fan-Out Buffer for Line Card Application