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L9969T Datasheet(PDF) 52 Page - STMicroelectronics |
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L9969T Datasheet(HTML) 52 Page - STMicroelectronics |
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52 / 70 page  Figure 30. SPI Timing diagrams All parameters at VDD: 4.4 V to 5.6 V. Battery supply VS is as specified in Section 2.6: Power Supply. Test condition: 2 V bias, 1 MHz, 20 mV (peak to peak) magnitude. Table 41. SPI parameters Symbol Parameter Condition Min Typ Max Unit Pin SI, SCK VSI_L input low level - -0.3 - 0.8 V VSI_H input high level - 2.0 - VDD + 0.3 V VSI_HYS input hysteresis - 0.15 - 1.0 V IpuSI Pullup current VSI = 0 V 20 40 60 µA CSI Input capacity - - - 10 pF Chip addressing bonding pad VCA_L input low level - -0.3 - 0.8 V VCA_H input high level - 2.0 - VDD + 0.3 V IpuSCK Pullup current VSCK = 0 V 20 40 60 µA CSCK Input capacity - - - 10 pF Pin NSS VSS_L input low level - -0.3 - 0.8 V VSS_H input high level - 2.0 - VDD + 0.3 V VSS_HYS input hysteresis - 0.15 - 1.0 V IpuSS Pullup current VNSSx=0V 20 40 60 µA CSS Input capacity - - - 15 pF L9969x Functional description DS14029 - Rev 6 page 52/70 |
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