SPSB100 datasheet(50/213 Pages) STMICROELECTRONICS

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The monitor issues a fault (whose threshold is set by BOOST_DSMON_TH[2..0] bits) if the monitored voltage is

above the programmed threshold for 5 consecutive periods of the BOOST PWM signal.

When a fault is detected (the flag is BOOST_VDSMON_ERROR), an interruption is sent on the IRQ pin (except if

it is masked by MASK_BOOST_VDSMON_IRQ) and the BOOST external transistor is permanently turned OFF.

MCU shall read and clear the status flag to turn back ON the BOOST driver.

The BYPASS driver includes a comparator to monitor the voltage across the bypass external transistor this

comparator is enabled as soon BYPASS is switched ON with a digital blanking time, tB_BYPASS_VDSM. The voltage

is monitored between VS and FBB pins.

The monitor issues a fault if the monitored voltage is above the programmed threshold

(BYPASS_DSMON_TH[2..0] bits) for a delay higher than tF_BYPASS_VDSM time.

When a fault is detected (flag is BYPASS_VDSMON_ERROR), an interruption is sent on the IRQ pin (except if it

is masked by MASK_BYPASS_VDSMON_IRQ), the BYPASS external transistor is switched off.

Latent fault detection of comparators is insured by Analog-BIST.

Figure 28. Boost and bypass Vds monitoring (extracted by application scheme)

4.4

Boost activity monitoring

In ACTIVE – FULL-POWER and in RECOVERY-1 states, the BOOST activity can be monitored through the live

SPI status bit BOOST_ENA_STATUS.

In ACTIVE – LOW-POWER state a flag is set BOOST_IN_LP and an interrupt is generated through IRQ pin

(except if it is masked by MASK_BOOST_IN_LP_IRQ) when the BOOST starts to switch.

In other states the BOOST is disabled.

4.5

WU and IGN monitoring

WU and IGN voltages can be measured through the ADC and values read back via SPI (WU[9..0] and IGN[9..0]).

4.6

Ground pin monitoring

Analog comparators are cross-monitoring the voltage on the three ground pads GND, Analog-GND and Digital-

GND (both bonded on SGND pin).

If at least one ground pad is electrically disconnected from the PCB ground plane with a level above VGnd_Loss_th

then a Ground loss is detected (GNDLOSS) after tGnd_Loss_FILT and the reaction is described in the

Section 4.8: HW low-level monitors.

Latent fault detection of ground comparators is insured by Analog-BIST.

4.7

Temperature monitoring

To provide an advanced on-chip temperature control, the power outputs are grouped in clusters with dedicated

thermal sensors. The sensors are suitably located on the device.

SPSB100

Protection, diagnosis and monitoring signals

DS14640 - Rev 2

page 50/213

SPSB100 Datasheet(PDF) 50 Page - STMicroelectronics