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SPSB100 Datasheet(PDF) 182 Page - STMicroelectronics |
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SPSB100 Datasheet(HTML) 182 Page - STMicroelectronics |
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182 / 213 page ![]() Bit Name Description 21 RES Reserved 20 RES Reserved 19 RES Reserved 18 RES Reserved 17 RES Reserved 16 RES Reserved Table 278. DSR12 (0x2C) Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 - (R0) - (R0) 0 (R) 0 (R) 0 (R) 0 (R) 0 (R) 0 (R) RES RES TEMP_CL3_9 TEMP_CL3_8 TEMP_CL3_7 TEMP_CL3_6 TEMP_CL3_5 TEMP_CL3_4 Reserved Reserved Temperature cluster 3 bit 9 Temperature cluster 3 bit 8 Temperature cluster 3 bit 7 Temperature cluster 3 bit 6 Temperature cluster 3 bit 5 Temperature cluster 3 bit 4 Table 279. DSR12 (0x2C) description Bit Name Description 15 RES Reserved 14 RES Reserved 13 TEMP_CL3_9 Temperature cluster 3 Bits cannot be cleared (a clear command generates a SPI_UNDEF_ADD flag) 12 TEMP_CL3_8 11 TEMP_CL3_7 10 TEMP_CL3_6 9 TEMP_CL3_5 8 TEMP_CL3_4 Table 280. DSR12 (0x2C) LSB Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 0 (R) 0 (R) 0 (R) 0 (R) 0 (RC1L) 0 (RC1L) 0 (RC1L) 0 (RC1L) TEMP_CL3_3 TEMP_CL3_2 TEMP_CL3_1 TEMP_CL3_0 CRC3 CRC2 CRC1 CRC0 Temperature cluster 3 bit 3 Temperature cluster 3 bit 2 Temperature cluster 3 bit 1 Temperature cluster 3 bit 0 Cyclic redundancy checking bit 3 Cyclic redundancy checking bit 2 Cyclic redundancy checking bit 1 Cyclic redundancy checking bit 0 Table 281. DSR12 (0x2C) LSB description Bit Name Description 7 TEMP_CL3_3 6 TEMP_CL3_2 5 TEMP_CL3_1 4 TEMP_CL3_0 SPSB100 SPI registers DS14640 - Rev 2 page 182/213 |
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