SPSB100 datasheet(205/213 Pages) STMICROELECTRONICS

205 / 213 page

List of tables

Table 1.

Pin function ........................................................................ 4

Table 2.

Operating conditions ................................................................. 7

Table 3.

Absolute maximum ratings ............................................................. 7

Table 4.

ESD protection ..................................................................... 9

Table 5.

Temperature ranges and thermal data ..................................................... 9

Table 6.

Voltage regulators configuration......................................................... 21

Table 7.

Wake-up events description ........................................................... 22

Table 8.

IRQ events ....................................................................... 43

Table 9.

Thermal cluster definition ............................................................. 51

Table 10.

Operation codes ................................................................... 59

Table 11.

Global status byte .................................................................. 60

Table 12.

RAM and ROM address range.......................................................... 61

Table 13.

RAM address ..................................................................... 61

Table 14.

ROM address ..................................................................... 61

Table 15.

Information registers map ............................................................. 62

Table 16.

SPI mode register .................................................................. 63

Table 17.

WD Type/Timing ................................................................... 63

Table 18.

WD bit position .................................................................... 64

Table 19.

Safety requirement list while MCU is in RUN mode............................................ 65

Table 20.

Safety requirement list while MCU is in Smart-Power mode ...................................... 67

Table 21.

Safety requirement list while MCU is in Stand-By mode ........................................ 68

Table 22.

Supply and supply monitoring .......................................................... 69

Table 23.

Power ground loss monitoring .......................................................... 70

Table 24.

Oscillator ........................................................................ 71

Table 25.

Power-on reset .................................................................... 71

Table 26.

LDO1 ........................................................................... 71

Table 27.

LDO2 ........................................................................... 72

Table 28.

Boost controller .................................................................... 72

Table 29.

BUCK1 converter................................................................... 75

Table 30.

BUCK2 converter................................................................... 77

Table 31.

BUCK3 converter................................................................... 86

Table 32.

Watchdog ........................................................................ 91

Table 33.

High side output OUT_HS............................................................. 94

Table 34.

Low side outputs ................................................................... 95

Table 35.

Wake-up Inputs .................................................................... 95

Table 36.

Input: CSN ....................................................................... 97

Table 37.

Inputs: CLK, SDI ................................................................... 97

Table 38.

SDI, CLK and CSN timing ............................................................. 97

Table 39.

Output: SDO ...................................................................... 98

Table 40.

SDO timing ....................................................................... 98

Table 41.

CSN timing ....................................................................... 98

Table 42.

SWDBG input .................................................................... 101

Table 43.

ADC characteristics ................................................................ 102

Table 44.

Interrupt output ................................................................... 102

Table 45.

FIN1 input....................................................................... 103

Table 46.

Timer values ..................................................................... 103

Table 47.

Reset output ..................................................................... 104

Table 48.

VREG.......................................................................... 104

Table 49.

BIST timing ...................................................................... 105

Table 50.

External components (referred to pictures in the related sections) ................................ 106

Table 51.

Global status byte GSB ..............................................................110

Table 52.

Global status byte GSB description ......................................................110

Table 53.

Control register overview (bit 31...28) upper nibbles ...........................................112

SPSB100

List of tables

DS14640 - Rev 2

page 205/213

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