D950-CORE datasheet(22/89 Pages) STMICROELECTRONICS

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D950-Core

Direct addressing

Memory direct addressing instructions require one extension word to provide the memory

address, and are executed in two cycles. They are used for data moves between memory and

direct addressable registers.

Registers addressable by the instruction code include:

•

16 for DCU (L1/L0/R1/R0/A1E/A1H/A1L/A0E/A0H/A0L/PH/PL/BSC/PSC/STA/

CCR),

•

13 for ACU (AX0/AX1/IX0/IX1/IX2/IX3/AY0/AY1/IY0/IY1/IY2/IY3/SPX),

•

3 for PCU (LS/LC/LE).

Figure 4.7

Direct Addressing

Indirect addressing

See RX1, RX0, MY1, MY0, MX1 and MX0 bits of the STA register. The instruction specifies

the address register (AX0, AX1, AY0, AY1) of the operand to process, and the address

calculation to be performed, according to STA register content.

At the end of the instruction, the new address register (AXi / AYi) contains the previously

selected address (AXi / AYi), post-incremented by the corresponding index registers (IXi / IYi).

Four types of indirect addressing modes are implemented:

1: Linear addressing with post-modification.

Address modification is done using the normal 16-bit 2's complement linear

arithmetic.

2: Modulo addressing with post-modification.

This mode can be selected individually for AX0, AX1, AY0, AY1 registers (see

MX0, MX1, MY0, MY1 bits of STA register).

BX / MX: 16-bit register Base / Maximum address for AX0 / AX1,

BY / MY: 16-bit register Base / Maximum address for AY0 / AY1.

Base and maximum addresses can be defined to any value, provided that: the

maximum address is greater than base address, the starting address is initial-

ized within the base/maximum address range, the index absolute value is less

than or equal to maximum address minus the base address.

value

address

Memory

VR02017F

D950-CORE Datasheet(PDF) 22 Page - STMicroelectronics