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74HC4017 Datasheet(PDF) 13 Page - NXP Semiconductors |
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74HC4017 Datasheet(HTML) 13 Page - NXP Semiconductors |
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13 / 23 page ![]() 74HC_HCT4017_3 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 03 — 8 January 2008 13 of 23 NXP Semiconductors 74HC4017; 74HCT4017 Johnson decade counter with 10 decoded outputs Measurement points are given in Table 8. VOL and VOH are typical voltage output levels that occur with the output load. Conditions: CP1 = LOW while CP0 is triggered on a LOW-to-HIGH transition and CP0 = HIGH, while CP1 is triggered on a HIGH-to-LOW transition. Fig 10. Waveforms showing the propagation delays for CP0, CP1 to Qn, Q5-9 outputs and the output transition times CP0 input VI GND VI GND VOH VOL VOH VOL Q1 - Q9 output CP1 input VM VM tPLH tPHL tPLH tPHL VM tTLH tTHL VM 001aah247 Q0, Q5 - Q9 output Table 8. Measurement points Type Input Output VM VM 74HC4017 0.5 × VCC 0.5 × VCC 74HCT4017 1.3 V 1.3 V |
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