DP83867CS datasheet(120/129 Pages) TI2

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• Changed RESERVED bit number from: 7 to: 8:7 ............................................................................................ 76

• Changed the default and description of the CLK_O_DISABLE bit (bit 6).........................................................94

• Clarified Figure 8-2 ........................................................................................................................................ 105

• Changed text in MDI traces bullet from: or to: and......................................................................................... 110

Changes from Revision * (October 2015) to Revision A (February 2017)

Page

• Updated data sheet text to the latest documentation and translations standards.............................................. 1

• Added storage temperature to Section 6.1 ........................................................................................................8

• Updated parameter symbol from VIH to VIH ......................................................................................................9

• Added MDC toggling clarification to Section 6.7 ..............................................................................................11

• Added Section 6.11 ......................................................................................................................................... 13

• Added DP83867IS/CS Start of Frame Detection Timing..................................................................................13

• Added section Section 7.3.2.1 .........................................................................................................................22

• Changed target strap voltage thresholds Table 7-5 .........................................................................................38

• Changed values for RX_CTRL pin for modes 1 and 2 to N/A in Table 7-6 ..................................................... 38

• Changed strap name SPEED_SEL to ANEG_SEL in Table 7-6 ..................................................................... 38

• Changed table name Speed Select Strap Details to Auto-Negotiation Select Strap Details in Table 7-7 ....... 38

• Changed strap option SPEED_SEL to ANEG_SEL in Table 7-7 .....................................................................38

• Changed mode 5 RGMII Clock Skew value from 4.0ns to 0ns in Table 7-8 ....................................................38

• Changed strap control of Speed Select bit 13 in Table 7-10 ........................................................................... 45

• Changed strap control of Speed Select bit 6 in Table 7-10 ............................................................................. 45

• Changed bit 9 name from 100BASE-T FULL DUPLEX to 1000BASE-T FULL DUPLEX in Table 7-19 ..........55

• Changed bit 9 descriptions from half duplex to full duplex in Table 7-19 ........................................................ 55

• Changed 'Interrupt Status and Event Control Register (ISR)' to 'MII Interrupt Control Register (MICR)' in

Section 7.6.16 ..................................................................................................................................................61

• Changed Register definition to move a statement from Section 7.6.17 to Section 7.6.16 .............................. 61

• Changed default of bit 9 from '1' to '0' in Table 7-28 ........................................................................................65

• Changed default of bits 5:0 from '0' to '0 0111' in Table 7-28 .......................................................................... 65

• Added Section 7.6.29 register.......................................................................................................................... 75

• Added Section 7.6.37 register.......................................................................................................................... 79

• Changed SPEED_SEL strap bit name to ANEG_SEL in Strap Configuration Status Register 1

(STRAP_STS1), Address 0x006E....................................................................................................................80

• Changed name of Bit 6:4 from 'STRAP_GMII_CLK_SKEW_TX' to 'STRAP_RGMII_CLK_SKEW_TX' in Table

7-49 ................................................................................................................................................................. 81

• Changed name of Bit 6:4 from 'STRAP_GMII_CLK_SKEW_RX' to 'STRAP_RGMII_CLK_SKEW_RX' in Table

7-49 ................................................................................................................................................................. 81

• Added Section 7.6.54 register.......................................................................................................................... 86

• Changed default of bits 12:8 to 0 1100 in Table 7-114 .................................................................................... 94

• Changed description for IO_IMPEDANCE_CTRL bits in Section 7.6.104 ...................................................... 94

• Changed Section 8.3 section..........................................................................................................................110

• Added power down supply sequence sentence in Section 8.3 ......................................................................110

• Added Figure 8-9 ........................................................................................................................................... 110

• Added Table 8-5 .............................................................................................................................................110

• Added note regarding 1.8V supply sequence if no load exists on 2.5V supply in Layout ............................. 110

11 Mechanical, Packaging, and Orderable Information

The following pages include mechanical, packaging, and orderable information. This information is the most

current data available for the designated devices. This data is subject to change without notice and revision of

this document. For browser-based versions of this data sheet, refer to the left-hand navigation.

DP83867CS, DP83867IS, DP83867E

SNLS504F – OCTOBER 2015 – REVISED JANUARY 2025

www.ti.com

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