LSF0101 1-Channel Auto-Bidirectional Multi-Voltage Level Translator

for Open-Drain and Push-Pull Applications

1 Features

• Provides bidirectional voltage translation with no

direction pin

• Supports up to 100-MHz up translation and greater

than 100-MHz down translation at

≤ 30 pF capacitive load and up To 40-MHz up or

down translation at 50 pF capacitive load

• Allows bidirectional voltage-level translation

between

– 0.95 V ↔ 1.8/2.5/3.3/5 V

– 1.2 V ↔ 1.8/2.5/3.3/5 V

– 1.8 V ↔ 2.5/3.3/5 V

– 2.5 V ↔ 3.3/5 V

– 3.3 V ↔ 5 V

• Low standby current

• 5-V tolerance I/O port to support TTL

• Low RON provides less signal distortion

• High-impedance I/O pins for EN = Low

• Flow-through pinout for easy PCB trace routing

• Latch-up performance >100 mA per JESD 17

• –40°C to 125°C operating temperature range

2 Applications

• GPIO, MDIO, PMBus, SMBus, SDIO, UART, I2C,

and other interfaces in telecom infrastructure

• Enterprise systems

• Communications equipment

• Personal electronics

• Industrial applications

3 Description

The LSF family of devices supports bidirectional

voltage translation without the need for DIR pin which

minimizes system effort (for PMBus, I2C, SMBus, and

so forth). The LSF family of devices supports up to

100-MHz up translation and greater than 100-MHz

down translation at ≤ 30 pF capacitive load and up to

40-MHz up or down translation at 50 pF capacitive

load which allows the LSF family to support more

consumer or telecom interfaces (MDIO or SDIO).

LSF family supports 5-V tolerance on I/O port which

makes it compatible with TTL levels in industrial and

telecom applications. The LSF family is able to set up

different voltage translation levels which makes it very

flexible.

Package Information

PART NUMBER

PACKAGE(1)

PACKAGE SIZE(2)

LSF0101

DRY (SON, 6)

1.45 mm × 1 mm

DTQ (X2SON, 6)

1 mm × 0.8 mm

(1)

For all available packages, see the orderable addendum at

the end of the data sheet.

(2)

The package size (length × width) is a nominal value and

includes pins, where applicable.

Vref_A

Vref_B

2

5

3

6 EN

4

1

GND

A1

B1

LSF0101

SW

Functional Block Diagram

LSF0101

SDLS973 – JUNE 2023

An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,

intellectual property matters and other important disclaimers. PRODUCTION DATA.