6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)(1)

MIN

MAX

UNIT

VS

Supply voltage, (V+) – (V–)

Single-supply

40

V

Dual-supply

±20

Signal input pins

Voltage

Common-mode(3)

(V–) – 0.5

(V+) + 0.5

V

Differential(2)

(V+) – (V–)

Current(3)

±10

mA

Output short current(4)

Continuous

Thermal pad voltage (DGN package)

(V–) – 1

(V–) + 30

V

TJ

Junction temperature(5)

-55

150

°C

Tstg

Storage temperature

–65

150

(1)

Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress

ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under

Recommended Operating Ratings. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2)

Input terminals are not clamped to each other with anti-parallel diodes. The JFET input stage allows large differential voltage values up

to the supply voltage of the device.

(3)

Input terminals are diode-clamped to the power-supply rails. Current-limit input signals that can swing more than 0.5 V beyond the

supply rails to 10 mA or less.

(4)

Short circuit to ground, one amplifier per package.

(5)

For information on device ambient and junction temperatures, see Section 8.4.1.1 and Section 7.3.11.

6.2 ESD Ratings

VALUE

UNIT

V(ESD)

Electrostatic discharge

Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins(1)

±2000

V

Charged device model (CDM), per JEDEC specification JESD22-C101, all pins(2)

±500

(1)

JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.

(2)

JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)

MIN

NOM

MAX

UNIT

VS

Supply voltage, (V+) – (V–)

Single supply

8

36

V

Dual supply

±4

±18

Thermal pad voltage (DGN package)

(V–)

(V+) + 18

V

TA

Ambient temperature(1)

–40

125

°C

(1)

For information on device ambient and junction temperatures, see Section 8.4.1.1 and Section 7.3.11.

6.4 Thermal Information

THERMAL METRIC(1)

OPA828

OPA2828

UNIT

D (SOIC)

DGN (HVSSOP)

DGN (HVSSOP)

8 PINS

8 PINS

8 PINS

RθJA

Junction-to-ambient thermal resistance

121.5

56.7

49.9

°C/W

RθJC(top)

Junction-to-case (top) thermal resistance

64.3

74.9

61.6

°C/W

RθJB

Junction-to-board thermal resistance

65

29.2

21.8

°C/W

ψJT

Junction-to-top characterization parameter

18

3.7

1.7

°C/W

ψJB

Junction-to-board characterization parameter

64.3

29.1

21.7

°C/W

(1)

For information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.

OPA828, OPA2828

SBOS671D – SEPTEMBER 2018 – REVISED DECEMBER 2022

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