8.3 Feature Description

8.3.1 TMP64 R-T table

The TMP64 R-T table must be re-calculated for any change in the bias voltage, bias resistor, or bias current. TI

provides a Thermistor Design Tool to calculate the R-T table. The system designer should always validate the

calculations provided.

8.3.2 Linear resistance curve

The TMP64 has good linear behavior across the whole temperature range as shown in Figure 7-1. This range

allows a simpler resistance-to-temperature conversion method that reduces look-up table memory requirements.

The linearization circuitry or midpoint calibration associated with traditional NTCs is not necessary with the

device.

The linear resistance across the entire temperature range allows the device to maintain sensitivity at higher

operating temperatures.

8.3.3 Positive Temperature Coefficient (PTC)

The TMP64 has a positive temperature coefficient. As temperature increases the device resistance increases

leading to a reduction in power consumption of the bias circuit. In comparison, a negative coefficient system

increases power consumption with temperature as the resistance decreases.

The TMP64 benefits from the reduced power consumption of the bias circuit with less self-heating than a typical

NTC system.

8.3.4 Built-In Fail Safe

The TMP6 family feature a positive tempeature coefficient. During a short-to-supply condition, the thermistor will

have increased current and power dissipated. Due to the positive temperature slope, the TMP6 will increase

resistance and limit self-heating by design.

In contrast, a NTC would continually reduce resistance due to self-heating leading to a positive feedback of

increasing power dissipation and decreasing resistance.

8.4 Device Functional Modes

The device has one mode of operation that applies when operated within the Recommended Operating

Conditions.

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TMP64

SNIS212C – DECEMBER 2019 – REVISED SEPTEMBER 2020

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