TMUX113X datasheet(24/42 Pages) TI2

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8.3.5 Ultra-low Leakage Current

The TMUX1133 and TMUX1134 provide extremely low on-leakage and off-leakage currents. The TMUX113x

devices are capable of switching signals from high source-impedance inputs into a high input-impedance op amp

with minimal offset error because of the ultra-low leakage currents. Figure 8-1 shows typical leakage currents of

the TMUX113x devices versus input voltage.

VS or VD - Source or Drain Voltage (V)

0.5

1.5

2.5

3.5

-40

-30

-20

-10

VDD = 3.63 V

VDD = 1.98 V

VDD = 1.32 V

D006

Figure 8-1. Leakage Current vs Input Voltage

8.3.6 Ultra-Low Charge Injection

The TMUX113x devices have a transmission gate topology, as shown in Figure 8-2. Any mismatch in the stray

capacitance associated with the NMOS and PMOS causes an output level change whenever the switch is

opened or closed.

The TMUX113x devices have special charge-injection cancellation circuitry that reduces the source-to-drain

charge injection to -1pC at VS = 1V as shown in Figure 8-3.

GDP

GDN

GSN

GSP

OFF

OFF ON

Figure 8-2. Transmission Gate Topology

Source Voltage (V)

-3

-2

-1

-20

-15

-10

-5

VDD = 5 V

VSS = 0 V

VDD = 3.3 V

VSS = 0 V

VDD = +2.5 V

VSS = -2.5 V

D012

Figure 8-3. Charge Injection vs Source Voltage

TMUX1133, TMUX1134

SCDS412B – JUNE 2019 – REVISED JANUARY 2024

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