VDD

VDD

VSS

VSS

OUTPUT

CL

SEL

S2

D

GND

0.1…F

0.1…F

VOUT

Output

VS

QC = CL ×

VOUT

VOUT

VSEL

VD

S1

N.C.

0 V

VDD

VSEL

VDD

0 V

tBBM 1

90%

Output

0 V

tOPEN (BBM) = min ( tBBM 1, tBBM 2)

tBBM 2

Logic

Control

(VSEL)

tr < 5ns

tf < 5ns

VS

OUTPUT

RL

CL

SEL

D

GND

VSEL

VDD

VDD

0.1…F

S2

S1

16

TMUX1219

SCDS409A – MAY 2019 – REVISED JUNE 2020

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Product Folder Links: TMUX1219

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Copyright © 2019–2020, Texas Instruments Incorporated

7.5 Break-Before-Make

Break-before-make delay is a safety feature that prevents two inputs from connecting when the device is

switching. The output first breaks from the on-state switch before making the connection with the next on-state

switch. The time delay between the break and the make is known as break-before-make delay. Figure 11 shows

the setup used to measure break-before-make delay, denoted by the symbol tOPEN(BBM).

Figure 11. Break-Before-Make Delay Measurement Setup

7.6 Charge Injection

The TMUX1219 has a transmission-gate topology. Any mismatch in capacitance between the NMOS and PMOS

transistors results in a charge injected into the drain or source during the falling or rising edge of the gate signal.

The amount of charge injected into the source or drain of the device is known as charge injection, and is denoted

by the symbol QC. Figure 12 shows the setup used to measure charge injection from Drain (D) to Source (Sx).

Figure 12. Charge-Injection Measurement Setup