VDD - Supply Voltage (V)

0.5

1.5

2.5

3.5

4.5

5.5

0

5

10

15

20

25

30

Rising

Falling

D004

22

TMUX1219

SCDS409A – MAY 2019 – REVISED JUNE 2020

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9.2.2.1 Design Requirements

This design example uses the parameters listed in Table 2.

Table 3. Design Parameters

PARAMETERS

VALUES

Supply (VDD)

5 V

Mux I/O signal range

0 V to VDD (Rail to Rail)

Control logic thresholds

1.8 V compatible (up to 5.5V)

9.2.2.2 Detailed Design Procedure

The application shown in Figure 19 demonstrates how to toggle between the DAC output and GND for control of

a power amplifier using a single control input. The DAC output is utilized to bias the gate of the power amplifier

and can be disconnected from the circuit using the select pin of the switch. The TMUX1219 can support 1.8-V

logic signals on the control input, allowing the device to interface with low logic controls of an FPGA or MCU. The

TMUX1219 can be operated without any external components except for the supply decoupling capacitors. The

select pin is recommended to have a weak pull-down or pull-up resistor to ensure the input is in a known state.

All inputs to the switch must fall within the recommend operating conditions of the TMUX1219 including signal

range and continuous current. For this design with a supply of 5 V the signal range can be 0 V to 5 V and the

max continuous current can be 30 mA.

9.2.2.3 Application Curve

A key parameter for this application is the transition time of the device. Faster transition time allows the system to

toggle between input sources at a faster rate and allows the output to settle to the final value. The TMUX1219

has a transition time that varies with supply voltage and is shown in Figure 20

TA = 25°C

Figure 20. Ttransition vs Supply Voltage

10 Power Supply Recommendations

The TMUX1219 operates across a wide supply range of 1.08 V to 5.5 V. Do not exceed the absolute maximum

ratings because stresses beyond the listed ratings can cause permanent damage to the devices.

Power-supply bypassing improves noise margin and prevents switching noise propagation from the VDD supply to

other components. Good power-supply decoupling is important to achieve optimum performance. For improved

supply noise immunity, use a supply decoupling capacitor ranging from 0.1 μF to 10 μF from VDD to ground.

Place the bypass capacitors as close to the power supply pins of the device as possible using low-impedance

connections. TI recommends using multi-layer ceramic chip capacitors (MLCCs) that offer low equivalent series

resistance (ESR) and inductance (ESL) characteristics for power-supply decoupling purposes. For very sensitive

systems, or for systems in harsh noise environments, avoiding the use of vias for connecting the capacitors to

the device pins may offer superior noise immunity. The use of multiple vias in parallel lowers the overall

inductance and is beneficial for connections to ground planes.