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IS25LE02GG-RHLA2:P-TY Datasheet(PDF) 36 Page - Integrated Silicon Solution, Inc

Part # IS25LE02GG-RHLA2:P-TY
Description  SERIAL FLASH MEMORY 133MHZ MULTI I/O SPI & QUAD I/O QPI DTR INTERFACE WITH ON-CHIP ECC
PDF  187 Pages
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Manufacturer  ISSI [Integrated Silicon Solution, Inc]
Direct Link  http://www.issi.com
Logo ISSI - Integrated Silicon Solution, Inc

IS25LE02GG-RHLA2:P-TY Datasheet(HTML) 36 Page - Integrated Silicon Solution, Inc

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IS25LE02GG
IS25WE02GG
Integrated Silicon Solution, Inc.- www.issi.com
36
Rev. A1
10/02/2025
6.6 ECC REGISTER
Related Commands: Read ECC Register (RDECC B3h) (1), Write ECC Register (WRECC B5h), Clear ECC Register
(CLECC, B6h).
Note:
1. 2Gb is an MCP of four 512Mb die, so the ECC register data after RDECC command is from one die
(previously selected die), and additional dummy read from another die (to select another die) + RDECC
command is required to get ECC register data from another die .
Table 6.26 ECC Register Format
Bit 47:16
Bit 15:8
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Default
00000000h
00h
0h
0h
0h
0h
0h
0h
0h
0h
Table 6.27 ECC Register Bit Definition (per 512Mb die)
Bit
Name
Definition
Read-
/Write
Type
0
ECCONOFF
ECC ON/OFF bit:
"0" indicates ECC is ON (default)
"1" indicates ECC is OFF
R/W
Volatile
1
ECCEVENT
ECC Event bit:
"0" indicates NO ECC correction event (default)
"1" indicates YES ECC correction event
R
Volatile
5:2
ECCCOUNTER
Store cumulative ECC correction occurrence.
Max. 15 ECC correction occurrence can be stored, and stays 15
after further occurrence.
“0000” is the default value.
R
Volatile
6
IPA_ECCB
Incremental Programming Attempt within ECC boundary bit:
“0” indicates NO IPA within ECC Boundary (default)
“1” indicates YES IPA with ECC Boundary.
Incremental Programming within ECC boundary is not allowed, and
automatically ignored when ECC is ON.
R
Volatile
15:7
Reserved
Reserved
R
Reserved
47:16
ECCFCA
Store 1st ECC Event occurred chunk address (A27:A4)
R
Volatile



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