MPQ2167 – 6V, 4A, FREQUENCY PROGRAMMABLE, BUCK CONVERTER, AEC-Q100 QUALIFIED

MPQ2167 Rev. 1.0

www.MonolithicPower.com

17

3/21/2019

MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.

© 2019 MPS. All Rights Reserved.

OPERATION

The MPQ2167 is a fully integrated, synchronous

rectified, step-down, non-isolated switch-mode

converter. It uses peak-current-mode control with

internal

compensation

for

faster

transient

response and cycle-by-cycle current limit.

A block diagram of the device is shown in Figure

1. It is available with a 2.7V to 6.0V input supply

range and can achieve up to 4A continuous

output current with excellent load and line

regulation over an ambient temperature range of

-40°C to +125°C. The output voltage can be

regulated as low as 0.606V.

The MPQ2167 is optimized for low voltage

portable applications where efficiency and small

size are critical. It can operate up to 2.2MHz

switching frequency, which enables the use of a

smaller inductor while also providing excellent

efficiency. It also allows for high power

conversion efficiency under a light load condition

with AAM.

FCCM

Pulling MODE high (>1.2V) forces the converter

into FCCM. In FCCM, the MPQ2167 operates in

a fixed frequency peak-current-control mode to

regulate the output voltage, regardless of the

output current. An internal clock initiates a FCCM

cycle. At the rise edge of the clock, the high-side

switch (HS-FET) turns on, and the inductor

current rises linearly to provide energy to the load.

The HS-FET remains on until its current hits the

COMP voltage, which is the output of the internal

error amplifier. The output voltage of the error

amplifier depends on the difference of the output

feedback voltage and the internal high precision

reference; it will determine how much energy

should be transferred to the load. The higher the

load current, the higher the COMP voltage.

When the HS-FET is off, the low-side switch (LS-

FET) will be turned on immediately and remains

on until the next clock starts. During this time, the

inductor current will flow through the LS-FET. In

order to avoid shoot-through, a dead time is

inserted to avoid the HS-FET and LS-FET turning

on at the same time. For each turn on/off period

in a switching cycle, the HS-FET will remain

on/off with a minimum on/off time limit.

AAM

Pulling MODE low (<0.4V) forces the converter

into light load advanced asynchronous mode

(AAM). There is an internally fixed AAM threshold

voltage (VAAM). Under a light load condition, the

value of VCOMP is low. If VCOMP becomes higher

than

VAAM,

the

MPQ2167

first

enters

discontinuous conduction operation with a fixed

frequency, as long as the inductor current

approaches zero. If the load decreases further, or

there is no load that makes VCOMP lower than

VAAM, the internal clock will be blocked, making

the MPQ2167 skip some pulses. During this time,

VFB is lower than VREF, so VCOMP will ramp up until

it exceeds VAAM. Then the internal clock will be

reset, and the crossover time is taken as a

benchmark for the next clock. This control

scheme helps achieve high efficiency by scaling

down the frequency to reduce the switching and

gate driver losses.

As the output current increases from a light load

condition, VCOMP becomes larger, and the

switching frequency increases.

If the output current exceeds the critical level,

when VCOMP is higher than VAAM, the MPQ2167

resumes fixed-frequency control (same as

FCCM). See Figure 2.

Figure 2: AAM and FCCM

Enable

The MPQ2167 can be enabled or disabled via a

remote EN signal that is referenced to ground. The

remote EN control operates with positive logic that

is compatible with popular logic devices. Positive

logic implies that when the input voltage exceeds

the under-voltage lockout (UVLO) threshold

(typically 2.5V), the converter is enabled by pulling

EN above 1.2V. Leaving the EN pin floating or

grounded will disable the MPQ2167. There is an

internal 1MΩ resistor from EN to ground.