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FAN3216T Datasheet(PDF) 2 Page - ON Semiconductor

Part # FAN3216T
Description  Gate Drivers, High-Speed, Low-Side, Dual 4-A
PDF  16 Pages
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Manufacturer  ONSEMI [ON Semiconductor]
Direct Link  http://www.onsemi.com
Logo ONSEMI - ON Semiconductor

FAN3216T Datasheet(HTML) 2 Page - ON Semiconductor

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2
PACKAGE OUTLINES
2
3
8
6
1
4
7
5
Figure 1. SOIC-8
(Top View)
THERMAL CHARACTERISTICS (Note 1)
Package
QL
(Note 2)
QJT
(Note 3)
QJA
(Note 4)
YJB
(Note 5)
YJT
(Note 6)
Unit
8-Pin Small Outline Integrated Circuit (SOIC)
38
29
150
41
2.3
°C/W
1. Estimates derived from thermal simulation; actual values depend on the application.
2. Theta_JL (QJL): Thermal resistance between the semiconductor junction and the bottom surface of all the leads (including any thermal pad)
that are typically soldered to a PCB.
3. Theta_JT (QJT): Thermal resistance between the semiconductor junction and the top surface of the package, assuming it is held at a uniform
temperature by a top-side heatsink.
4. Theta_JA (QJA): Thermal resistance between junction and ambient, dependent on the PCB design, heat sinking, and airflow. The value given
is for natural convection with no heatsink using a 2S2P board, as specified in JEDEC standards JESD51-2, JESD51-5, and JESD51-7, as
appropriate.
5. Psi_JB (YJB): Thermal characterization parameter providing correlation between semiconductor junction temperature and an application
circuit board reference point for the thermal environment defined in Note 4. For the SOIC-8-EP package, the board reference is defined as
the PCB copper connected to the thermal pad and protruding from either end of the package. For the SOIC-8 package, the board reference
is defined as the PCB copper adjacent to pin 6.
6. Psi_JT (YJT): Thermal characterization parameter providing correlation between the semiconductor junction temperature and the center of
the top of the package for the thermal environment defined in Note 4.
Figure 2. Pin Assignment
1
ENB
VDD
OUTA
OUTB
2
3
4
8
6
5
7
A
B
ENA
INA
GND
INB
PIN DEFINITIONS
Name
Pin Description
ENA
Enable Input for Channel A. Pull pin LOW to inhibit driver A. ENA has TTL thresholds for INx threshold
ENB
Enable Input for Channel B. Pull pin LOW to inhibit driver B. ENB has TTL thresholds INx threshold
GND
Ground. Common ground reference for input and output circuits
INA
Input to Channel A
INB
Input to Channel B
OUTA
Gate Drive Output A: Held LOW unless required input(s) are present and VDD is above UVLO threshold
OUTB
Gate Drive Output B: Held LOW unless required input(s) are present and VDD is above UVLO threshold
VDD
Supply Voltage. Provides power to the IC



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