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ADP1741 Datasheet(PDF) 4 Page - Analog Devices

Part # ADP1741
Description  2 A, Low Dropout, CMOS Linear Regulator
PDF  6 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

ADP1741 Datasheet(HTML) 4 Page - Analog Devices

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ADP1740/ADP1741
Preliminary Technical Data
Rev. PrA | Page 4 of 6
Parameter
Symbol
Test Conditions
Min
Typ
Max
Unit
POWER SUPPLY REJECTION RATIO
PSRR
1 kHz, VOUT = 0.75 V, IOUT = 10 mA
70
dB
1 kHz, VOUT = 2.5 V, IOUT = 10 mA
60
dB
10 kHz, VOUT = 0.75 V, IOUT = 10 mA
TBD
dB
10 kHz, VOUT = 2.5 V, IOUT = 10 mA
TBD
dB
1 Accuracy when OUT is connected directly to ADJ. When OUT voltage is set by external feedback resistors, absolute accuracy in adjust mode depends on the tolerances
of resistors used.
2 Based on an end-point calculation using 10 mA and 2 A loads.
3 Dropout voltage is defined as the input to output voltage differential when the input voltage is set to the nominal output voltage. This applies only for output
voltages above 1.6 V.
4 Start-up time is defined as the time between the rising edge of EN to OUT being at 95% of its nominal value.
5 Current limit threshold is defined as the current at which the output voltage drops to 90% of the specified typical value. For example, the current limit for a 1.0 V
output voltage is defined as the current that causes the output voltage to drop to 90% of 1.0 V, or 0.9 V.



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