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EVAL-ADN2805EBZ Datasheet(PDF) 1 Page - Analog Devices |
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EVAL-ADN2805EBZ Datasheet(HTML) 1 Page - Analog Devices |
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1 / 16 page ![]() 1.25 Gbps Clock and Data Recovery IC ADN2805 Rev. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibilityis assumedbyAnalogDevicesforitsuse,norforanyinfringementsof patentsorother rightsofthirdpartiesthatmayresultfromitsuse.Specificationssubjecttochangewithoutnotice.No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 ©2008 Analog Devices, Inc. All rights reserved. FEATURES Locks to 1.25 Gbps NRZ serial data input Patented clock recovery architecture No reference clock required Loss-of-lock indicator I2C interface to access optional features Single-supply operation: 3.3 V Low power: 390 mW typical 5 mm × 5 mm 32-lead LFCSP, Pb free APPLICATIONS GbE line card GENERAL DESCRIPTION The ADN2805 provides the receiver functions of quantization and clock and data recovery for 1.25 Gbps. The ADN2805 automatically locks to all data rates without the need for an external reference clock or programming. All SONET jitter requirements are met, including jitter transfer, jitter generation, and jitter tolerance. All specifications are specified for −40°C to +85°C ambient temperature, unless otherwise noted. The ADN2805 is available in a compact 5 mm × 5 mm 32-lead LFCSP. FUNCTIONAL BLOCK DIAGRAM 2 LOL DATAOUTP/ DATAOUTN ADN2805 CLKOUTP/ CLKOUTN 2 VCC VEE CF1 CF2 PIN NIN VREF BUFFER VCO PHASE SHIFTER PHASE DETECT FREQUENCY DETECT DATA RE-TIMING LOOP FILTER LOOP FILTER REFCLKP/REFCLKN (OPTIONAL) Figure 1. |
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