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EN25F80-100VIP Datasheet(PDF) 32 Page - Eon Silicon Solution Inc. |
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EN25F80-100VIP Datasheet(HTML) 32 Page - Eon Silicon Solution Inc. |
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32 / 32 page ![]() This Data Sheet may be revised by subsequent versions ©2004 Eon Silicon Solution, Inc., www.essi.com.tw or modifications due to changes in technical specifications. 32 EN25F80 Rev. E, Issue Date: 2007/11/23 Revisions List Revision No Description Date A Initial release 2006/11/02 B Add 8 pins PDIP package at page1,page31 and page 32 2006/12/01 C Change Table 8. DC Characteristics VIL Max 0.3 VCC to 0.2 VCC in page 23 2007/02/07 D 1. Add 8 Lead PDIP in Figure 1. Connection Diagram in page 2. 2. Change Table 7 Write Inhibit Voltage (Max) from 2V to 2.5V in page 22 3. Change Table 10. 100MHz AC Characteristics tCLQV from 6 ns to 8 ns in page 24 2007/05/16 E 1. Update the Table 6. Status Register Bit Locations in page 10. 2. Modify the Figure 17 in page 18 for the starting point of tRES2 3. Modify the Figure 18 in page 19 (1) revise the manufacture ID to 1Ch (2) the number of clock count to cover the manufacture ID should be 31 to 38 and the last clock to clock out device ID is 46. 4. Modify the Figure 19 in page 20, the clock count to cover the device ID should be from 15 to 31 2007/11/23 |
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