L4992 datasheet(14/26 Pages) STMICROELECTRONICS

14 / 26 page

offered by manufacturer, also for surface mount assemblies.

+3.3 V Transformer

The primary winding carries the secondary power as well, thus the total primary average current is:

Itot3

= Iout3

Vinlin

⋅ Iout12

3.3

where Vinlin is the voltage generated during the recirculation of the primary and fed into the input of the

+12V linear regulator. The turns ratio 1:n of the transformer is chosen so that Vinlin is above 13V. To re-

duce the turns ratio in order to minimize stray parameters, the secondary is referred to the 3.3V output,

and therefore the minimum value is given by:

nmin

Vinlin

− 3.3 + Vf

3.3

where Vf is the forward drop across the rectifier (assume 1V to be conservative). Make sure the secon-

dary is connected with the proper polarity (see fig. 6).

The minimum primary inductance value can be expressed as:

L3pmin

⋅

3.3

⋅ (Vin − 3.3)2

Vin

⋅ fsw ⋅ [Itot3

⋅ RF ⋅ (Vin − 3.3) − n ⋅ Vin ⋅ Iout12]

where RF, to get positive values for L3pmin, must satisfy the inequality:

⋅ Vin ⋅ Iout12

Itot3

⋅ (Vin − 3.3

)

and where Vin can be either Vinmin or Vinmax, whichever gives the higher value for L3pmin.

With a primary inductance L3p > L3pmin the primary peak current, which must not saturate the magnetic

core, will be:

IL3pk

= Itot3 +

3.3

⋅ (Vin max − 3.3)

⋅ fsw ⋅ L3p ⋅ Vin max +

⋅ Iout12

As to the transformer realization, the considerations regarding to the +5.1V inductor can be here repeated.

Power MOSFET’s and Schottky diodes

Since the gate drivers of the L4992 are powered by a 5V bus , the use of logic-level MOSFET’s is highly

recommended, especially for high current applications. Their breakdown voltage V(BR)DSS must be

greater than Vinmax with a certain margin, so the selection will address 20V or 30V devices.

The RDS(ON) can be selected once the allowable power dissipation has been established. By selecting

identical power MOSFET’s as the main switch and the synchronous rectifier, the total power they dissi-

pate does not depend on the duty cycle. Thus, if PON is this power loss (few percent of the rated output

power), the required RDS(ON) (@ 25 °C) can be derived from:

RDS(ON) =

PON

Iout

⋅ (1 + α ⋅ ∆T)

where Iout is either Itot3 or Iout5, according to the section under consideration,

α is the temperature coeffi-

cient of RDS(ON) (typically,

α = 5 ⋅ 10-3 °C-1 for these low-voltage classes) and ∆T the admitted tempera-

ture rise.

It is worth noticing, however, that generally the lower RDS(ON), the higher is the gate charge Qg, which

leads to a higher gate drive consumption. In fact, each switching cycle, a charge Qg moves from the in-

put source to ground, resulting in an equivalent drive current:

= Qg ⋅ fsw

DESIGN PROCEDURE (continued)

L4992

14/26

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