9

LTC1164-6

11646fa

S

APPLICATI

I FOR ATIO

and 1kHz cutoff frequency receives a 98.5kHz, 10mVRMS

input signal, a 1.5kHz, 10

µVRMS alias signal will appear at

its output. When the LTC1164-6 operates with a clock-to-

cutoff frequency of 50:1, aliasing occurs at twice the clock

frequency. Table 5 shows details.

Table 4. Maximum VIN vs VS and fCLK

POWER SUPPLY

MAXIMUM fCLK

MAXIMUM VIN

±7.5V

1.5MHz

1VRMS (fIN > 35kHz)

1MHz

3VRMS (fIN > 25kHz)

≥1MHz

0.7VRMS (fIN > 250kHz)

±5V

1MHz

2.5VRMS (fIN > 25kHz)

1MHz

0.5VRMS (fIN > 100kHz)

Single 5V

1MHz

0.7VRMS (fIN > 25kHz)

1MHz

0.5VRMS (fIN > 100kHz)

Table 5. Aliasing (fCLK = 100kHz)

INPUT FREQUENCY

OUTPUT LEVEL

OUTPUT FREQUENCY

(VIN = 1VRMS)

(Relative to Input)

(Aliased Frequency)

(kHz)

(dB)

(kHz)

fCLK/fC = 100:1, fCUTOFF = 1kHz

96

(or 104)

–75.0

4.0

97

(or 103)

– 68.0

3.0

98

(or 102)

– 65.0

2.0

98.5 (or 101.5)

– 60.0

1.5

99

(or 101)

– 3.2

1.0

99.5 (or 100.5)

– 0.5

0.5

fCLK/fC = 50:1, fCUTOFF = 2kHz

192 (or 208)

– 76.0

8.0

194 (or 206)

– 68.0

6.0

196 (or 204)

– 63.0

4.0

198 (or 202)

– 3.4

2.0

199 (or 201)

– 1.3

1.0

199.5(or 200.5)

– 0.9

0.5

Table 6. Transient Response of LTC Lowpass Filters

DELAY

RISE

SETTLING OVER-

TIME*

TIME**

TIME***

SHOOT

LOWPASS FILTER

(SEC)

(SEC)

(SEC)

(%)

LTC1064-3 Bessel

0.50/fC

0.34/fC

0.80/fC

0.5

LTC1164-5 Linear Phase

0.43/fC

0.34/fC

0.85/fC

0

LTC1164-6 Linear Phase

0.43/fC

0.34/fC

1.15/fC

1

LTC1264-7 Linear Phase

1.15/fC

0.36/fC

2.05/fC

5

LTC1164-7 Linear Phase

1.20/fC

0.39/fC

2.20/fC

5

LTC1064-7 Linear Phase

1.20/fC

0.39/fC

2.20/fC

5

LTC1164-5 Butterworth

0.80/fC

0.48/fC

2.40/fC

11

LTC1164-6 Elliptic

0.85/fC

0.54/fC

4.30/fC

18

LTC1064-4 Elliptic

0.90/fC

0.54/fC

4.50/fC

20

LTC1064-1 Elliptic

0.85/fC

0.54/fC

6.50/fC

20

* To 50%

±5%, ** 10% to 90% ±5%, *** To 1% ±0.5%

8th Order Elliptic Lowpass Filter

(fCLK/fC) = 50:1

1

2

3

4

5

6

7

14

13

12

11

10

9

8

LTC1164-6

VIN

VOUT

fCLK

V+

NOTES:

1. OPTIONAL OUTPUT BUFFER

1/2

πRC = (2)(fCUTOFF)

2. PINS 1, 8, 13 CAN BE GROUNDED

OR LEFT FLOATING

1164-6 TA06

C

–

+

V –

0.1

µF

R

V+

V –

LT®1006

0.1

µF

V+

INPUT

90%

50%

10%

OUTPUT

tr

td

ts

1164-6 F04

RISE TIME (tr) =

±5%

0.54

fCUTOFF

SETTLING TIME (ts) =

±5%

(TO 1% of OUTPUT)

4.3

fCUTOFF

TIME DELAY (td) = GROUP DELAY ≈

(TO 50% OF OUTPUT)

0.85

fCUTOFF

Figure 4

S

APPLICATI

TYPICAL