May 24, 2005
Document No. 001-00353 Rev. **
21
CG64xxAM Preliminary Data Sheet
3. Electrical Specifications
3.4.7
AC I2C Specifications
The following table lists guaranteed maximum and minimum specifications for the voltage and temperature ranges: 4.75V to 5.25V
and -40°C
≤ TA ≤ 85°C. Typical parameters apply to 5V at 25°C and are for design guidance only.
Figure 3-5. Definition for Timing for Fast/Standard Mode on the I2C Bus
Table 3-15. AC Characteristics of the I2C SDA and SCL Pins for Vcc
≥ 4.75V
Symbol
Description
Standard Mode
Fast Mode
Units
Notes
Min
Max
Min
Max
FSCLI2C
SCL Clock Frequency
0
100
0
400
kHz
THDSTAI2C
Hold Time (repeated) START Condition. After this period,
the first clock pulse is generated.
4.0
–0.6
–
µs
TLOWI2C
LOW Period of the SCL Clock
4.7
–1.3
–
µs
THIGHI2C
HIGH Period of the SCL Clock
4.0
–0.6
–
µs
TSUSTAI2C
Set-up Time for a Repeated START Condition
4.7
–0.6
–
µs
THDDATI2C
Data Hold Time
0
–0
–
µs
TSUDATI2C
Data Set-up Time0
2500
–0
100a
a. A Fast-Mode I2C-bus device can be used in a Standard-Mode I2C-bus system, but the requirement tSU;DAT ≥ 250 ns must then be met. This will automatically be the case if
the device does not stretch the LOW period of the SCL signal. If such device does stretch the LOW period of the SCL signal, it must output the next data bit to the SDA line
trmax + tSU;DAT = 1000 + 250 = 1250 ns (according to the Standard-Mode I2C-bus specification) before the SCL line is released.
–0
ns0
TSUSTOI2C
Set-up Time for STOP Condition
4.0
–0.6
–
µs
TBUFI2C
Bus Free Time Between a STOP and START Condition
4.7
–1.3
–
µs
TSPI2C
Pulse Width of spikes are suppressed by the input filter.
–
–
0
50
ns
SDA
SCL
T
BUFI2C
T
SPI2C
T
HDSTAI2C
T
T
LOWI2C
T
SUDATI2C
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