
AT404 EZYTRIGGER
April 2002
Data subject to change without notice
Page 2 of 2
minimum of about 5
µS. The printed circuit board tracks from the fibre optic receiver to the AT404
EasyTrigger need to be a short as possible. Furthermore the (+) track should preferably surround the
(-) track to minimize capacitive interference from fast rising voltages in the vicinity.
Since the gate current is derived from the anode of the thyristor no gate drive power supply is
required. It is advisable to maintain the control signal during the entire conduction period of the
thyristor. Once the thyristor is triggered, the gate current ceases to flow because the anode voltage
drops below the threshold voltage, which arises because the anode voltage is used as a source for the
gate current. The effect of this threshold voltage is very small because it only limits the minimum
regulated output voltage of the controller. For example with a 115V single phase controller, this
minimum voltage is less than 0.3% and on a 400V system it can be safely ignored.
The thyristor is triggered from a current source with a maximum voltage of 22V. This allows for twisted
gate leads of up to 1m without seriously affecting the rate of rise of gate current (di/dt)g.
Note that the envelope of the voltage across the thyristor can have any desired shape provided the
rms value is below Vm and the peak value does not exceed Vp.
The connection diagram below shows the typical application of the AT404 EasyTrigger in mains
operated systems using thyristors with current ratings of a few Amps up to several thousand Amps.
CONTACTS
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Lectron Industries
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Union, NJ 07083
USA
+1 908 687 2626
+1 908 687 5678
sales@lectronindustries.com
Website: www.bsrcontrols.com