DS1307ZSLASHTR datasheet(3/15 Pages) MAXIM

3 / 15 page

DS1307 64 x 8, Serial, I

2C Real-Time Clock

3 of 15

AC ELECTRICAL CHARACTERISTICS

(

VCC = 4.5V to 5.5V; TA = 0°C to +70°C, TA = -40°C to +85°C.)

PARAMETER

SYMBOL

CONDITIONS

MIN

TYP

MAX

UNITS

SCL Clock Frequency

fSCL

100

kHz

Bus Free Time Between a STOP and

START Condition

tBUF

4.7

µs

Hold Time (Repeated) START

Condition

tHD:STA

(Note 4)

4.0

µs

LOW Period of SCL Clock

tLOW

4.7

µs

HIGH Period of SCL Clock

tHIGH

4.0

µs

Setup Time for a Repeated START

Condition

tSU:STA

4.7

µs

Data Hold Time

tHD:DAT

µs

Data Setup Time

tSU:DAT

(Notes 5, 6)

250

Rise Time of Both SDA and SCL

Signals

1000

Fall Time of Both SDA and SCL

Signals

300

Setup Time for STOP Condition

tSU:STO

4.7

µs

CAPACITANCE

(TA = +25°C)

PARAMETER

SYMBOL

CONDITIONS

MIN

TYP

MAX

UNITS

Pin Capacitance (SDA, SCL)

CI/O

Capacitance Load for Each Bus

Line

(Note 7)

400

Note 1:

All voltages are referenced to ground.

Note 2:

Limits at -40°C are guaranteed by design and are not production tested.

Note 3:

ICCS specified with VCC = 5.0V and SDA, SCL = 5.0V.

Note 4:

After this period, the first clock pulse is generated.

Note 5:

A device must internally provide a hold time of at least 300ns for the SDA signal (referred to the VIH(MIN) of the

SCL signal) to bridge the undefined region of the falling edge of SCL.

Note 6:

The maximum tHD:DAT only has to be met if the device does not stretch the LOW period (tLOW) of the SCL signal.

Note 7:

CB—total capacitance of one bus line in pF.

DS1307Z/TR Datasheet(PDF) 3 Page - Maxim Integrated Products

DS1307Z/TR Datasheet(HTML) 3 Page - Maxim Integrated Products

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

Datasheet Download

Link URL