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CONFIDENTIAL
PRELIMINARY
CYNSE10512
CYNSE10256
CYNSE10128
Document #: 38-02069 Rev. *F
Page 13 of 153
3.0
Device Architecture Overview
3.1
Data Array, Mask Array and Table Widths
The Ayama 10000 device consists of M × 72-bit (M = 256K for CYNSE10512, 128K for CYNSE10256, 64K for CYNSE10128)
storage cells referred to as data bits. There is also a mask cell corresponding to each data cell. A database entry includes both
the data and mask cells. Figure 3-1 shows the four possible table width sizes of the data and mask cells and the maximum possible
table depth for each width.
The Ayama 10000 can be configured to contain tables of different widths in one device up to a maximum equal to 512K/256K/128K
72-bit entries. For example, a single Ayama 10000 device can have both a 5-Tuple Flow table and an IPv6 forwarding table.
Figure 3-2 shows a sample configuration of multiple table widths in a CYNSE10512 device.
Note:
1.
576-bit table configuration is only supported in the Enhanced mode.
Data
M/2
144-Bit
Data
Masks
M/4
288-Bit
M
72-Bit
Masks
Data
Masks
M/8
Figure 3-1. Ayama 10000 Database Table Widths
M = 256K for CYNSE10512
128K for CYNSE10256
64K for CYNSE10128
576-Bit[1]
32K
144
16K
288
64K
72
8K
Figure 3-2. Multi-Width Database Configuration Example
576[1]
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