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L6732 Datasheet(PDF) 25 Page - STMicroelectronics |
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L6732 Datasheet(HTML) 25 Page - STMicroelectronics |
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25 / 36 page ![]() L6732 Application details 25/36 ● Compensation network design: – Put the gain R5/R3 in order to obtain the desired converter bandwidth – Place ω Z1 before the output filter resonance ω LC; – Place ω Z2 at the output filter resonance ω LC; – Place ω P1 at the output capacitor ESR zero ω ESR; – Place ω P2 at one half of the switching frequency; – Check the loop gain considering the error amplifier open loop gain. Figure 19. Asymptotic Bode plot of Converter's open loop gain LC C Vosc Vin R R ϖ ϖ ⋅ ∆ ⋅ = 3 5 (19) |
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