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M25P32-VMP6TP Datasheet(PDF) 43 Page - Numonyx B.V |
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M25P32-VMP6TP Datasheet(HTML) 43 Page - Numonyx B.V |
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43 / 53 page ![]() M25P32 DC and AC parameters 43/53 Figure 23. Serial input timing tW Write Status Register cycle time 1.3 15 ms tPP (8) Page Program cycle time (256 bytes) 0.64 5ms Page Program cycle time (n bytes) int(n/8) × 0.02(9) Page Program cycle time (VPP = VPPH) (256 bytes) 0.64 tSE Sector Erase cycle time 0.6 3s Sector Erase cycle time (VPP = VPPH)0.6 tBE Bulk Erase cycle time 23 80 s Bulk Erase cycle time (VPP = VPPH)13 1. Details of how to find the Technology Process in the marking are given in AN1995, see also Section 12: Part numbering. 2. Typical values given for TA = 25 °C. 3. tCH + tCL must be greater than or equal to 1/ fC 4. Value guaranteed by characterization, not 100% tested in production. 5. Expressed as a slew-rate. 6. Only applicable as a constraint for a WRSR instruction when SRWD is set at 1. 7. VPPH should be kept at a valid level until the program or erase operation has completed and its result (success or failure) is known. 8. When using the Page Program (PP) instruction to program consecutive bytes, optimized timings are obtained with one sequence including all the bytes versus several sequences of only a few bytes. (1 ≤n ≤256) 9. int(A) corresponds to the upper integer part of A. E.g. int(12/8) = 2, int(32/8) = 4 int(15.3) =16. Table 14. AC characteristics (T9HX technology) (continued) Applies only to products made with T9HX technology, identified with Process digit “4”(1) Test conditions specified in Table 10 and Table 11 Symbol Alt. Parameter Min. Typ.(2) Max. Unit C D AI01447C S MSB IN Q tDVCH High Impedance LSB IN tSLCH tCHDX tCHCL tCLCH tSHCH tSHSL tCHSH tCHSL |
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