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TMS320DM643 Datasheet(PDF) 108 Page - Texas Instruments |
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TMS320DM643 Datasheet(HTML) 108 Page - Texas Instruments |
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108 / 162 page  www.ti.com 8 7 4 4 3 2 2 1 A0 A1 B0 B1 A30 A31 B30 B31 C0 C1 C2 C3 C31 AHCLKR/X (Falling Edge Polarity) AHCLKR/X (Rising Edge Polarity) AFSR/X (Bit Width, 0 Bit Delay) AFSR/X (Bit Width, 1 Bit Delay) AFSR/X (Bit Width, 2 Bit Delay) AFSR/X (Slot Width, 0 Bit Delay) AFSR/X (Slot Width, 1 Bit Delay) AFSR/X (Slot Width, 2 Bit Delay) AXR[n] (Data In/Receive) 6 5 ACLKR/X (CLKRP = CLKXP = 0)† ACLKR/X (CLKRP = CLKXP = 1)‡ † For CLKRP = CLKXP = 0, the McASP transmitter is configured for rising edge (to shift data out) and the McASP receiver is configured for falling edge (to shift data in). ‡ For CLKRP = CLKXP = 1, the McASP transmitter is configured for falling edge (to shift data out) and the McASP receiver is configured for rising edge (to shift data in). TMS320DM643 Video/Imaging Fixed-Point Digital Signal Processor SPRS269C – FEBRUARY 2005 – REVISED JANUARY 2007 Figure 5-35. McASP Input Timings DM643 Peripheral Information and Electrical Specifications 108 Submit Documentation Feedback |
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