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TPS2491DGS Datasheet(PDF) 16 Page - Texas Instruments |
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TPS2491DGS Datasheet(HTML) 16 Page - Texas Instruments |
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16 / 20 page ![]() www.ti.com Dt + C O V VCC I CHARGE C G + I GATE Dt V VCC * CISS TPS2490 TPS2491 SLVS503 – NOVEMBER 2003 APPLICATION INFORMATION (continued) STEP 6. Choose R5, R6, & C1 R5 is intended to suppress high-frequency oscillations; a resistor of 10 Ω will serve for most applications but if M1 has a CISS below 200 pF, then use 33 Ω. Applications with larger MOSFETs and very short wiring may not require R5. R6 is required only if the PG output drives a circuit that requires it. It is recommended that the sink current be less than 2 mA. C1 is a bypass capacitor to help with control of transient voltages, unit emissions, and local supply noise while in the disabled state. Where acceptable, a value in the range of 0.001 µF to 0.1 µF is recommended. STEP 7. Choose D1 Transient voltage suppressor D1 is required in applications where there will be enough energy in the distribution inductance to cause a voltage surge above the TPS2490/91 rated maximum. Such transients can be caused by card insertions or shorts on the input or output of the TPS2490/91. ALTERNATIVE INRUSH DESIGNS Gate Capacitor (dV/dt) Control The TPS2490/91 can be used with applications that require constant turn-on currents. The current is controlled by a single capacitor from the GATE terminal to ground with a series resistor. M1 appears to operate as a source follower (following the gate voltage) in this implementation. Choose a time to charge, ∆t, based on the output capacitor, input voltage VI, and desired charge current, ICHARGE. Select ICHARGE to be less than PLIM ÷ VVCC if the power limit feature is kept. To select the gate capacitance: where CISS is the gate capacitance of M1, and IGATE is the nominal gate charge current. The TIMER capacitor can then be selected to be much smaller as the current and power limit is not active during initial power on. A series resistor of about 1 k Ω should be used in conjunction with C G. PROG Inrush Control A capacitor can be connected from the PROG pin to ground to reduce the initial current step seen in Figure 12 based on the typical application circuit on page 1. This method maintains a relatively fast turn-on time without the drawbacks of a gate-to-ground capacitor that include increased short circuit response time and less predictable gate clamping. ADDITIONAL DESIGN CONSIDERATIONS Use of PG Use the PG pin to control and coordinate a downstream dc/dc converter. A long time delay is needed to allow CO to fully charge before the converter starts if this is not done. An undesirable latchup condition can be created between the TPS2490 output characteristic and the dc/dc converter input characteristic if the converter starts while CO is still charging; the PG pin is one way to avoid this. Faults and Backplane Voltage Droop A hard short at the output of the TPS2490/91 during normal operation could result in activation of the enable or UVLO circuit instead of the current limit if the input voltage droops sufficiently. The lower GATE drive in this condition will cause a prolonged, larger over-current spike. This can be eliminated by filtering EN, or distributing capacitance on the bus itself. Capacitance from adjacent plugged-in units may help with this as well. 16 |
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