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PCA9600DPZ Datasheet(PDF) 3 Page - NXP Semiconductors

Part # PCA9600DPZ
Description  Dual bidirectional bus buffer
PDF  32 Pages
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

PCA9600DPZ Datasheet(HTML) 3 Page - NXP Semiconductors

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NXP Semiconductors
PCA9600
Dual bidirectional bus buffer
6 Pinning information
6.1 Pinning
PCA9600D
SX
VCC
RX
SY
TX
RY
GND
TY
002aac836
1
2
3
4
6
5
8
7
Figure 2. Pin configuration for SO8
PCA9600DP
SX
VCC
RX
SY
TX
RY
GND
TY
002aac837
1
2
3
4
6
5
8
7
Figure 3. Pin configuration for TSSOP8 (MSOP8)
6.2 Pin description
Symbol
Pin
Description
SX
1
I2C-bus (SDA or SCL)
RX
2
receive signal
TX
3
transmit signal
GND
4
negative supply voltage
TY
5
transmit signal
RY
6
receive signal
SY
7
I2C-bus (SDA or SCL)
VCC
8
positive supply voltage
Table 3. Pin description
7 Functional description
Refer to Figure 1.
The PCA9600 has two identical buffers allowing buffering of SDA and SCL I2C-bus
signals. Each buffer is made up of two logic signal paths, a forward path from the I2C-bus
interface, pins SX and SY which drive the buffered bus, and a reverse signal path from
the buffered bus input, pins RX and RY to drive the I2C-bus interface. These paths:
• sense the voltage state of I2C-bus pins SX (and SY) and transmit this state to pin TX
(and TY respectively), and
• sense the state of pins RX and RY and pull the I2C-bus pin LOW whenever pin RX or
pin RY is LOW.
PCA9600
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2021. All rights reserved.
Product data sheet
Rev. 6.1 — 20 December 2021
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