74HC02

http://onsemi.com

3

Guaranteed Limit

Symbol

Parameter

Test Conditions

(V)

– 55 to

25_C

v85_C

v125°C

Unit

Minimum High−Level Input

Voltage

2.0

3.0

4.5

6.0

1.5

2.1

3.15

4.2

1.5

2.1

3.15

4.2

1.5

2.1

3.15

4.2

V

Maximum Low−Level Input

Voltage

2.0

3.0

4.5

6.0

0.5

0.9

1.35

1.8

0.5

0.9

1.35

1.8

0.5

0.9

1.35

1.8

V

Minimum High−Level Output

Voltage

2.0

4.5

6.0

1.9

4.4

5.9

1.9

4.4

5.9

1.9

4.4

5.9

V

3.0

4.5

6.0

2.48

3.98

5.48

2.34

3.84

5.34

2.20

3.7

5.2

Maximum Low−Level Output

Voltage

2.0

4.5

6.0

0.1

0.1

0.1

0.1

0.1

0.1

0.1

0.1

0.1

V

3.0

4.5

6.0

0.26

0.26

0.26

0.33

0.33

0.33

0.4

0.4

0.4

Maximum Input Leakage

Current

6.0

±0.1

±1.0

±1.0

mA

Maximum Quiescent Supply

Current (per Package)

6.0

2.0

20

40

mA

NOTE: Information on typical parametric values can be found in Chapter 2 of the ON Semiconductor High−Speed CMOS Data Book

(DL129/D).

Guaranteed Limit

Symbol

Parameter

(V)

– 55 to

25_C

v85_C

v125_C

Unit

Maximum Propagation Delay, Input A or B to Output Y

(Figures 1 and 2)

2.0

3.0

4.5

6.0

75

30

15

13

95

40

19

16

110

55

22

19

ns

Maximum Output Transition Time, Any Output

(Figures 1 and 2)

2.0

3.0

4.5

6.0

75

30

15

13

95

40

19

16

110

55

22

19

ns

Maximum Input Capacitance

—

10

10

10

pF

NOTE: For propagation delays with loads other than 50 pF, and information on typical parametric values, see Chapter 2 of the ON

Semiconductor High−Speed CMOS Data Book (DL129/D).

Power Dissipation Capacitance (Per Gate)*

pF

22

ON Semiconductor High−Speed CMOS Data Book (DL129/D).