7
09/04/07
IS-5114
FI1
I
N/A
Input
Field identification signal (for interlaced output imagers)
PD[11:0]
B
2 mA
Input
Pixel data - use MSBs in case of data less than 12 bits
(PD[1:0] also programmable as Keyboard: KBD[9:8])
(PD[3:0] also programmable as GPIO)
Display Interface
VCLKI
I
N/A
Input
Video crystal connection 1 (up to 27 MHz, depending on display type)
VCLKO
O
*
X (1)
Video crystal connection 2
LFTV
O
*
X (2)
External low-pass filter for video PLL
PXOE
I
N/A
Input
Pixel output enable (active low)
PCLKO
B
8 mA
L
Pixel clock output
VBLK
B
4 mA
PXOE =
0: L
1: Input
Video, Casio LCD: Vertical blanking reference
AU LCD: VSY
Toppoly LCD: XVD
HBLK
B
4 mA
PXOE =
0: L
1: Input
Video, Casio LCD: Horizontal blanking reference
AU LCD: HSY
Toppoly LCD: XHD
FLD
B
4 mA
PXOE =
0: L
1: Input
Field select
DISP[29:24]
B
2 mA
Input
Display data
component: PR[1:0], PB[1:0], Y[1:0]
VESA: B[1:0], G[1:0], R[1:0]
(DISP[29:27] also programmable as INT[7:5])
(also programmable as SMC: A[19:14])
(also programmable as GPIO)
DISP[23:16]
B
2 mA
Input
RGB24b: B[2:0], G[1:0], R[2:0]
CVBS: NoConnect[7:2], CVBS[1:0]
Separate: NoConnect[7:4], CV_C[1:0], CV_Y[1:0]
Component: PR[4:2], PB[3:2], Y[4:2]
VESA: B[4:2], G[3:2], R[4:2]
Epson LCD: FV, FRYP, NoConnect[5:0]
(also programmable as SMC: A[23:20], Chip Select [7:4] (NCS [7:4], active
low)
(also programmable as GPIO)
Table 3-1.
I/O Signal Descriptions (Continued)
Pin Name
Direction
Drive
Strength
Reset
State
Function
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