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M41T11 Datasheet(PDF) 16 Page - STMicroelectronics |
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M41T11 Datasheet(HTML) 16 Page - STMicroelectronics |
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16 / 29 page ![]() Clock operation M41T11 16/29 adjustment per calibration step in the calibration register. Assuming that the oscillator is in fact running at exactly 32,768Hz, each of the 31 increments in the Calibration byte would represent +10.7 or –5.35 seconds per month which corresponds to a total range of +5.5 or – 2.75 minutes per month. Two methods are available for ascertaining how much calibration a given M41T11 may require. The first involves simply setting the clock, letting it run for a month and comparing it to a known accurate reference (like WWV broadcasts). While that may seem crude, it allows the designer to give the end user the ability to calibrate his clock as his environment may require, even after the final product is packaged in a non-user serviceable enclosure. All the designer has to do is provide a simple utility that accessed the Calibration byte. The second approach is better suited to a manufacturing environment, and involves the use of some test equipment. When the Frequency Test (FT) Bit, the seventh-most significant bit in the Control Register, is set to a '1', and the oscillator is running at 32,768Hz, the FT/OUT pin of the device will toggle at 512Hz. Any deviation from 512Hz indicates the degree and direction of oscillator frequency shift at the test temperature. For example, a reading of 512.01024Hz would indicate a +20 ppm oscillator frequency error, requiring a –10(XX001010) to be loaded into the Calibration Byte for correction. Note that setting or changing the Calibration Byte does not affect the Frequency test output frequency. 3.2 Output driver pin When the FT Bit is not set, the FT/OUT pin becomes an output driver that reflects the contents of D7 of the control register. In other words, when D6 of location 7 is a zero and D7 of location 7 is a zero and then the FT/OUT pin will be driven low. Note: The FT/OUT pin is open drain which requires an external pull-up resistor. 3.3 Preferred initial power-on defaults Upon initial application of power to the device, the FT Bit will be set to a '0' and the OUT Bit will be set to a '1'. All other Register bits will initially power-on in a random state. |
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