M50FW080N5TP datasheet(24/56 Pages) STMICROELECTRONICS

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Command interface

M50FW080

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4.4

Program command

The Program command can be used to program a value to one address in the memory array

at a time. Two Bus Write operations are required to issue the command; the second Bus

Write cycle latches the address and data in the internal state machine and starts the

Program/Erase Controller. Once the command is issued subsequent Bus Read operations

read the Status Register. See the section on the Status Register for details on the definitions

of the Status Register bits.

If the address falls in a protected block then the Program operation will abort, the data in the

memory array will not be changed and the Status Register will output the error.

During the Program operation the memory will only accept the Read Status Register

command and the Program/Erase Suspend command. All other commands will be ignored.

Typical Program times are given in Table 14.

Note that the Program command cannot change a bit set at ‘0’ back to ‘1’ and attempting to

do so will not cause any modification on its value. One of the Erase commands must be

used to set all of the bits in the block to ‘1’.

See Figure 18, for a suggested flowchart on using the Program command.

4.5

Quadruple Byte Program command

The Qua-druple Byte Program Command can be only used in A/A Mux mode to program

four adjacent bytes in the memory array at a time. The four bytes must differ only for the

addresses A0 and A10. Programming should not be attempted when VPP is not at VPPH.

The operation can also be executed if VPP is below VPPH, but result could be uncertain. Five

Bus Write operations are required to issue the command. The second, the third and the

fourth Bus Write cycle latches respectively the address and data of the first, the second and

the third byte in the internal state machine. The fifth Bus Write cycle latches the address and

data of the fourth byte in the internal state machine and starts the Program/Erase Controller.

Once the command is issued subsequent Bus Read operations read the Status Register.

See the section on the Status Register for details on the definitions of the Status Register

bits.

During the Quadruple Byte Program operation the memory will only accept the Read Status

ignored. Typical Quadruple Byte Program times are given in Table 8.

Note that the Quadruple Byte Program command cannot change a bit set to ‘0’ back to ‘1’

and attempting to do so will not cause any modification on its value. One of the Erase

commands must be used to set all of the bits in the block to ‘1’.

See Figure 19, Quadruple Byte Program Flowchart and Pseudo Code, for a suggested

flowchart on using the Quadruple Byte Program command.

M50FW080N5TP Datasheet(PDF) 24 Page - STMicroelectronics