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SN74CBTD3384CPWR Datasheet(PDF) 2 Page - Texas Instruments

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Part # SN74CBTD3384CPWR
Description  10-BIT FET BUS SWITCH WITH LEVEL SHIFTING 5-V BUS SWITCH WITH -2-V UNDERSHOOT PROTECTION
PDF  18 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

SN74CBTD3384CPWR Datasheet(HTML) 2 Page - Texas Instruments

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SN74CBTD3384C
10BIT FET BUS SWITCH WITH LEVEL SHIFTING
5V BUS SWITCH WITH 2V UNDERSHOOT PROTECTION
SCDS133A −SEPTEMBER 2003 − REVISED OCTOBER 2003
2
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
description/ordering information (continued)
The SN74CBTD3384C is a high-speed TTL-compatible FET bus switch with low ON-state resistance (ron),
allowing for minimal propagation delay. This device features an integrated diode in series with VCC to provide
level shifting for 5-V input down to 3.3-V output levels. Active Undershoot-Protection Circuitry on the A and B
ports of the SN74CBTD3384C provides protection for undershoot up to −2 V by sensing an undershoot event
and ensuring that the switch remains in the proper OFF state.
The SN74CBTD3384C is organized as two 5-bit bus switches with separate output-enable (1OE, 2OE) inputs.
It can be used as two 5-bit bus switches or as one 10-bit bus switch. When OE is low, the associated 5-bit bus
switch is ON, and the A port is connected to the B port, allowing bidirectional data flow between ports. When
OE is high, the associated 5-bit bus switch is OFF, and a high-impedance state exists between the A and B ports.
This device is fully specified for partial-power-down applications using Ioff. The Ioff feature ensures that
damaging current will not backflow through the device when it is powered down. The device has isolation during
power off.
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
FUNCTION TABLE
(each 5-bit bus switch)
INPUT
INPUT/OUTPUT
FUNCTION
INPUT
OE
INPUT/OUTPUT
A
FUNCTION
L
B
A port = B port
H
Z
Disconnect
logic diagram (positive logic)
1A1
SW
1B1
1A5
1OE
SW
1B5
2A1
SW
2B1
2A5
2OE
SW
2B5
3
11
1
14
22
13
2
10
15
23



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