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M54HC279 Datasheet(PDF) 1 Page - STMicroelectronics |
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M54HC279 Datasheet(HTML) 1 Page - STMicroelectronics |
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1 / 10 page ![]() M54HC279 M74HC279 March 1993 QUAD S - R LATCH B1R (Plastic Package) ORDER CODES : M54HC279F1R M74HC279M1R M74HC279B1R M74HC279C1R F1R (Ceramic Package) M1R (Micro Package) C1R (Chip Carrier) PIN CONNECTIONS (top view) NC = No Internal Connection . HIGH SPEED tPD = 12 ns (TYP.) AT VCC =5 V . LOW POWER DISSIPATION ICC =2 µA (MAX.) AT TA =25 °C . HIGH NOISE IMMUNITY VNIH =VNIL =28 % VCC (MIN.) . OUTPUT DRIVE CAPABILITY 10 LSTTL LOADS . SYMMETRICAL OUTPUT IMPEDANCE IOH =IOL = 4 mA (MIN.) . BALANCED PROPAGATION DELAYS tPLH =tPHL . WIDE OPERATING VOLTAGE RANGE VCC (OPR) = 2 V TO 6 V . PIN AND FUNCTION COMPATIBLE WITH 54/74LS279 The M54/74HC279 is a high speed CMOS QUAD S - R LATCH fabricated in silicon gate C 2MOS tech- nology. It has the same high speed performance of LSTTL combined with true CMOS low power con- sumption. All inputs are equipped with protection circuits against static discharge and transient excess volt- age. DESCRIPTION INPUT AND OUTPUT EQUIVALENT CIRCUIT 1/10 |
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