M54HC390 datasheet(1/13 Pages) STMICROELECTRONICS

Part #	M54HC390

Description	DUAL DECADE COUNTER

PDF	13 Pages

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Manufacturer	STMICROELECTRONICS [STMicroelectronics]

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M54HC390

M74HC390

February 1993

DUAL DECADE COUNTER

B1R

(Plastic Package)

ORDER CODES :

M54HC390F1R

M74HC390M1R

M74HC390B1R

M74HC390C1R

F1R

(Ceramic Package)

M1R

(Micro Package)

C1R

(Chip Carrier)

PIN CONNECTIONS (top view)

NC =

No Inter-

nal Con-

DESCRIPTION

.

HIGH SPEED

fMAX = 84 MHz (TYP.) AT VCC =5 V

.

LOW POWER DISSIPATION

ICC =4

µA (MAX.) AT TA =25 °C

.

HIGH NOISE IMMUNITY

VNIH =VNIL =28 % VCC (MIN.)

.

OUTPUT DRIVE CAPABILITY

10 LSTTL LOADS

.

SYMMETRICAL OUTPUT IMPEDANCE

|IOH|= IOL = 4 mA (MIN.)

.

BALANCED PROPAGATION DELAYS

tPLH =tPHL

.

WIDE OPERATING VOLTAGE RANGE

VCC (OPR) = 2 V TO 6 V

.

PIN AND FUNCTION COMPATIBLE WITH

54/74LS390

The M54/74HC390 is a high speed CMOS DUAL

DECADE COUNTER fabricated in silicon gate

C

2MOS technology. It has the same high speed per-

formance of LSTTL combined with true CMOS low

power consumption.

This dual decade counter contains two independent

ripple carry counters. Each counter is composed of

a divide-by-two and divide-by-five counter. The

divide-by-two and divide-by-five counters can be

cascaded to form dual decade, dual biquinary, or

various combinations up to a single divide-by-100

counter.

Each 4-bit counter is incremented on the high to low

transition (negative edge) of the clock input, and

each has an independent clear input. When clear is

set low all four bits of each counter are set to low.

This enables count truncation and allows the im-

plementation of divide-by-N counter configurations.

All inputs are equipped with protection circuits

against static discharge and transient excess volt-

age.

1/13

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