M59MR032CGC datasheet(10/49 Pages) STMICROELECTRONICS

10 / 49 page

M59MR032C, M59MR032D

10/49

Table 8. User Bus Operations (1)

Note: 1. X = Don’t care.

Table 9. Read Electronic Signature (AS and Read CFI instructions) (1)

Note: 1. Addresses are latched on the rising edge of L input.

Table 10. Read Block Protection (AS and Read CFI instructions) (1)

Note: 1. Addresses are latched on the rising edge of L input.

2. A locked block can be unprotected only with WP at VIH.

Operation

ADQ0-ADQ15

Write

VIL

VIH

VIL

VIH

Data Input

Output Disable

VIL

VIH

Hi-Z

Standby

VIH

Hi-Z

Reset / Power-down

VIL

VIH

Hi-Z

Block Locking

VIL

VIH

VIL

Code

Device

A0-A7

A8-A20

Data

Manufacturer Code

VIL

VIH

00h

Don’t Care

0020h

Device Code

M59MR032C

VIL

VIH

01h

Don’t Care

00A4h

M59MR032D

VIL

VIH

01h

Don’t Care

00A5h

Block Status

A0-A7

A8-A11

A12-A20

Data

Protected and

unlocked

VIL

VIH

02h

Don’t Care

Block Address

0001

Unprotected and

unlocked

VIL

VIH

02h

Don’t Care

Block Address

0000

Protected and locked

VIL

VIH

02h

Don’t Care

Block Address

0003

Unprotected and

locked (2)

VIL

VIH

02h

Don’t Care

Block Address

0002

DEVICE OPERATIONS

The following operations can be performed using

the appropriate bus cycles: Address Latch, Read

Array (Random, and Page Modes), Write com-

mand, Output Disable, Standby, Reset/Power-

down and Block Locking. See Table 8.

Address Latch. In asynchronous operation, the

address is latched on the rising edge of L input; in

burst mode, the address is latched either by L go-

ing high or with a rising/falling edge of K, depend-

ing on the clock configuration.

Read. Read operations are used to output the

contents of the Memory Array, the Electronic Sig-

nature, the Status Register, the CFI, the Block

Protection Status, the Configuration Register sta-

tus and the Security Code.

Read operation of the Memory Array may be per-

formed in asynchronous page mode or synchro-

nous burst mode. In asynchronous page mode

data is internally read and stored in a page buffer.

The page has a size of 4 words and is addressed

by ADQ0 and ADQ1 address inputs.

According to the device configuration the following

Read operations: Electronic Signature - Status

ration Register Status - Security Code must be ac-

cessed as asynchronous read or as single

synchronous burst mode (see Figure 4). Both Chip

Enable E and Output Enable G must be at VIL in

order to read the output of the memory.

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