R03DS0149EJ0200 Rev.2.00

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Feb.25.25

Datasheet

UPC813

High Slew Rate, Low Offset Voltage

J-FET Input Operational Amplifier

DESCRIPTION

UPC813 is a high-speed version of UPC811. The J-FET input operational amplifier features a high-speed PNP

transistor in the output stage for stable operation at a high slew rate of 25V/μs with a gain of 1 (full feedback).

The resistor-trimming method proven in other Renesas High-Precision Op-Amp and High-Precision reference

voltage is incorporate in this Op-Amp input stage, thus producing an excellent low offset voltage characteristics

that has surpassed conventional general purpose op-amp in spite of being J-FET input.

Under the same series, UPC814, 4094 with the same circuit configuration are also available.

FEATURES

• Input Offset Voltage

±1 mV (TYP.) ( ±2.5 mV MAX.)

• VIO Temperature Drift

±7 µV/°C (TYP.)

• Input Bias Current

50 pA (TYP.)

• Slew Rate

25 V/μs (TYP.)

• Unity Gain Frequency

6 MHz (TYP.))

• Input Equivalent Noise Voltage Density

19 nV/ Hz (TYP.) (f = 1 kHz)

• Stable operation against capacitive load

(Capacitive Load at 220 pF, AV = +1 )

• Built-In Phase Compensation Circuit

• Built-In Output Short Circuit Protection

• Standard Single Op-Amp terminal connection (pin compatible)

ORDERING INFORMATION

Order Name (1)

Package

UPC813G2-AP

8-Pin plastic SOP ( 5.72 mm ( 225 ))

(1) Order names containing E1 or E2 indicate that the packaging format is embossed taping.

Pin 1 of E1 is on draw-out side, and pin 1 of E2 is at take-up side.

EQUIVALENT CIRCUIT

PIN CONFIGURATION (Top View)

UPC813G2

Note NC : No Connection