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M54HC366 Datasheet(PDF) 1 Page - STMicroelectronics |
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M54HC366 Datasheet(HTML) 1 Page - STMicroelectronics |
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1 / 11 page  M54/M74HC365 M54/M74HC366 October 1992 HC365 NON INVERTING - HC366 INVERTING HEX BUS BUFFER (3-STATE) B1R (Plastic Package) ORDER CODES : M54HCXXXF1R M74HCXXXM1R M74HCXXXB1R M74HCXXXC1R F1R (Ceramic Package) M1R (Micro Package) C1R (Chip Carrier) PIN CONNECTIONS (top view) DESCRIPTION . HIGH SPEED tPD = 9 ns (TYP) AT VCC =5 V . LOW POWER DISSIPATION ICC =4 µA (MAX.) AT TA =25 °C . HIGH NOISE IMMUNITY VNIH =VNIL =28 % VCC (MIN.) . OUTPUT DRIVE CAPABILITY 15 LSTTL LOADS . SYMMETRICAL OUTPUT IMPEDANCE |IOH|= IOL = 6 mA (MIN.) . BALANCED PROPAGATION DELAYS tPLH =tPHL . WIDE OPERATING VOLTAGE RANGE VCC (OPR) = 2 V TO 6 V . PIN AND FUNCTION COMPATIBLE WITH 54/74LS365/366 The M54/74HC365 and the M54/74HC366 are high speed CMOS HEX BUS BUFFER fabricated in sili- con gate C 2MOS technology. They have the same high speed performance of LSTTL combined with true CMOS low power consumption. All six buffers are controlled by the combination of two enable inputs (G1 and G2) ; all outputs of these buffers are enabled only when both G1 and G2 in- puts are held low, under all other conditions these output are disabled to be high-impedance. These outputs are capable of driving up to 15 LSTTL loads. The designer has a choice of non-inverting outputs (HC365) and inverting outputs (HC366). All inputs are equipped with protection circuits against static discharge and transient excess voltage. HC366 HC365 1/11 |
Similar Part No. - M54HC366 |
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Similar Description - M54HC366 |
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