www.austriamicrosystems.com/LED-Driver-ICs/AS1112

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AS1112

Datasheet - D e t a i l e d D e s c r i p t i o n

Figure 12. Dot Correction Data Input Timing Diagram

Setting Greyscale Brightness

The brightness of each channel output can be adjusted using a 12 bits-per-channel PWM control scheme which results in 4096 brightness steps,

from 0% to 100% brightness. The brightness level for each output is calculated as:

Where:

GSn is the programmed greyscale value for OUTn (GSn = 0 to 4095);

n = 0 to 15 greyscale data for all outputs.

The device powers up with the following default seetings: GS = 4095 and DC = 63.

The input shift register shifts greyscale data into the greyscale register for all channels simultaneously. The complete greyscale data format con-

sists of 16 x 12 bit words, which forms a 192-bit wide data packet (see Figure 13).

Note:

The data packet must be clocked in with the MSB first.

Figure 13. Greyscale Data Packet Format

When pin MODE is tied to GND, the AS1112 enters greyscale data input mode. The device switches the input shift register to 192-bit width. After

all data is clocked in, the rising edge of the LD signal latches the data into the greyscale register (see Figure 14).

All greyscale data in the input shift register is replaced with status information data (SID) after latching into the greyscale register.

DCn

MSB-2

DCn

MSB-1

DCn

LSB+1

DCn

MSB

DCn-1

LSB

DCn

LSB

DCn+1

MSB

DCn+1

MSB-1

DCn-1

MSB-1

DCn-1

MSB-2

DCn-1

LSB+1

DCn-1

LSB

DCn

MSB

DCn

MSB-1

DCn

MSB-2

DCn-1

MSB

MODE

SDI

CLK

SDO

LD

VCC

Dot Correction Mode

Data Input Cycle n

Dot Correction Mode

Data Input Cycle n +1

tH1

tWH2

tSU1

1

2

tWH0

tWL0

1

2

1

95

96

GND

tSU0

%Brightness =

GSn

4095

(EQ 4)

x 100

GS15.11

MSB

191

GS0.0

GS0.11

GS1.0

GS14.11

GS15.0

LSB

GS OUT0

GS OUT14:GS OUT1

...

...

...

GS OUT15

180

179

12

11

0