AS1130 datasheet(48/67 Pages) AMSOSRAM

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ams Datasheet

Page 47

[v2-01] 2016-Oct-12

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AS1130 − Register Description

Note(s):

1. CLK synchronization is done via the SYNC pin. Only one option can be activated (Input or Output).

Interrupt Status Register (0x0E)

This is a read only register. Within this register the cause of an

interrupt can be read out. After power up or a reset the default

setting of this register is 0x20. A read out command will set this

Figure 51:

Interrupt Status Register Format

0sync_in

R/W

The internal oscillator is disabled. Pin D4 is used as clk

input for system-clk.(1)

0: disabled

1: enabled

0x0E Interrupt Status Register

Bit

Bit Name

Default

Access

Bit Description

7frame_int

0: No interrupt

1: Defined Frame is displayed (see Interrupt Frame

Definition Register (0x08))

6i2c_int

0: No interrupt

1: I²C watchdog reports a deadlock on the interface

por_int

0: No interrupt

1: POR was triggered

4overtemp_int

0: No interrupt

1: Overtemperature limit is reached

low_vdd_int

0: No interrupt

1: VDD is too low to drive requested current through the

LEDs

2open_int

0: No interrupt

1: Error on open test

short_int

0: No interrupt

1: Error on short test

movie_int

0: No interrupt

1: Play movie is finished

0x0B CLK Synchronization Register

Bit

Bit Name

Default

Access

Bit Description

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